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Implement instruction re-naming.
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- Closes #48 - Instruction Renaming
- Closes #46 - Shorter names, and consistency for instructions with immediate operands
- Closes #45 - Vector instruction names and dot-extensions
- Closes #42 - Use of "dots" in assembly instruction names
- Closes #41 - Change scalar instruction names to remove 's' prefix.

This is a squash commit. It contains all of the commits made on
the `dev/instruction-renaming` branch.

---

commit 93be8b0
Author: Ben Marshall <ben.marshall@bristol.ac.uk>
Date:   Tue Sep 22 13:49:29 2020 +0100

    sail: pollentropy -> pollentropyi

commit 519a04f
Author: Ben Marshall <ben.marshall@bristol.ac.uk>
Date:   Tue Sep 22 13:45:56 2020 +0100

    spec, sail: Instruction renaming.

    - Implement all renaming for SAIL and LaTeX source file.

     On branch dev/instruction-renaming
     Changes to be committed:
    	modified:   doc/opcodes-crypto-scalar.tex
    	modified:   doc/opcodes-crypto-vector.tex
    	modified:   doc/tex/sec-scalar-aes.tex
    	modified:   doc/tex/sec-scalar-sha2.tex
    	modified:   doc/tex/sec-scalar-sm3.tex
    	modified:   doc/tex/sec-scalar-sm4.tex
    	modified:   doc/tex/sec-scalar.tex
    	modified:   doc/tex/sec-vector-aes.tex
    	modified:   doc/tex/sec-vector-grev.tex
    	modified:   doc/tex/sec-vector-rotate.tex
    	modified:   doc/tex/sec-vector-sha2.tex
    	modified:   sail/riscv_insts_crypto.sail
    	modified:   sail/riscv_insts_crypto_rv32.sail
    	modified:   sail/riscv_insts_crypto_rv64.sail
    	modified:   sail/riscv_types_crypto.sail
    	modified:   tools/opcodes-crypto-vector

     Changes not staged for commit:
    	modified:   extern/riscv-gnu-toolchain (modified content)
    	modified:   extern/riscv-isa-sim (modified content)

commit 5fa3fb1
Author: Ben Marshall <ben.marshall@bristol.ac.uk>
Date:   Sun Sep 20 18:55:22 2020 +0100

    Working on #48 - Instruction Renaming.

    - Renamed all scalar instructions in:
      - Benchmarks
      - Spike
      - Binutils
      - Opcode descriptions.
    - Still do do:
      - Specs: Vector and Scalar
      - SAIL code.
      - Example RTL.

     On branch dev/instruction-renaming
     Changes to be committed:
    	modified:   benchmarks/aes/zscrypto_rv32/aes_128_ks.S
    	modified:   benchmarks/aes/zscrypto_rv32/aes_192_ks.S
    	modified:   benchmarks/aes/zscrypto_rv32/aes_256_ks.S
    	modified:   benchmarks/aes/zscrypto_rv32/aes_dec.S
    	modified:   benchmarks/aes/zscrypto_rv32/aes_enc.S
    	modified:   benchmarks/aes/zscrypto_rv64/aes_128_ks.S
    	modified:   benchmarks/aes/zscrypto_rv64/aes_192_ks.S
    	modified:   benchmarks/aes/zscrypto_rv64/aes_256_ks.S
    	modified:   benchmarks/aes/zscrypto_rv64/aes_dec.S
    	modified:   benchmarks/aes/zscrypto_rv64/aes_enc.S
    	modified:   benchmarks/aes/zscrypto_rv64/aes_ks_dec_invmc.S
    	modified:   benchmarks/sha256/zscrypto/sha256.c
    	modified:   benchmarks/sha512/zscrypto_rv64/sha512.c
    	modified:   benchmarks/share/riscv-crypto-intrinsics.h
    	modified:   benchmarks/sm4/zscrypto/sm4_zscrypto.c
    	modified:   tools/opcodes-crypto-scalar
    	modified:   tools/opcodes-crypto-vector
    	modified:   tools/patch-binutils.patch
    	modified:   tools/patch-spike.patch

     Changes not staged for commit:
    	modified:   extern/riscv-gnu-toolchain (modified content, untracked content)
    	modified:   extern/riscv-isa-sim (modified content)

 On branch dev/next-release
 Your branch is up-to-date with 'origin/dev/next-release'.

 Changes to be committed:
	modified:   benchmarks/aes/zscrypto_rv32/aes_128_ks.S
	modified:   benchmarks/aes/zscrypto_rv32/aes_192_ks.S
	modified:   benchmarks/aes/zscrypto_rv32/aes_256_ks.S
	modified:   benchmarks/aes/zscrypto_rv32/aes_dec.S
	modified:   benchmarks/aes/zscrypto_rv32/aes_enc.S
	modified:   benchmarks/aes/zscrypto_rv64/aes_128_ks.S
	modified:   benchmarks/aes/zscrypto_rv64/aes_192_ks.S
	modified:   benchmarks/aes/zscrypto_rv64/aes_256_ks.S
	modified:   benchmarks/aes/zscrypto_rv64/aes_dec.S
	modified:   benchmarks/aes/zscrypto_rv64/aes_enc.S
	modified:   benchmarks/aes/zscrypto_rv64/aes_ks_dec_invmc.S
	modified:   benchmarks/sha256/zscrypto/sha256.c
	modified:   benchmarks/sha512/zscrypto_rv64/sha512.c
	modified:   benchmarks/share/riscv-crypto-intrinsics.h
	modified:   benchmarks/sm4/zscrypto/sm4_zscrypto.c
	modified:   doc/opcodes-crypto-scalar.tex
	modified:   doc/opcodes-crypto-vector.tex
	modified:   doc/tex/sec-scalar-aes.tex
	modified:   doc/tex/sec-scalar-sha2.tex
	modified:   doc/tex/sec-scalar-sm3.tex
	modified:   doc/tex/sec-scalar-sm4.tex
	modified:   doc/tex/sec-scalar.tex
	modified:   doc/tex/sec-vector-aes.tex
	modified:   doc/tex/sec-vector-grev.tex
	modified:   doc/tex/sec-vector-rotate.tex
	modified:   doc/tex/sec-vector-sha2.tex
	modified:   sail/riscv_insts_crypto.sail
	modified:   sail/riscv_insts_crypto_rv32.sail
	modified:   sail/riscv_insts_crypto_rv64.sail
	modified:   sail/riscv_types_crypto.sail
	modified:   tools/opcodes-crypto-scalar
	modified:   tools/opcodes-crypto-vector
	modified:   tools/patch-binutils.patch
	modified:   tools/patch-spike.patch

 Changes not staged for commit:
	modified:   extern/riscv-gnu-toolchain (modified content)
	modified:   extern/riscv-isa-sim (modified content)
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24 changes: 12 additions & 12 deletions benchmarks/aes/zscrypto_rv32/aes_128_ks.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -57,10 +57,10 @@ aes_128_enc_key_schedule: // a0 - uint32_t rk [AES_128_RK_WORDS]
xor C0, C0, RCT // c0 ^= rcp

ROR32I T1, T2, C3, 8 // tr = ROR32(c3, 8)
saes32.encs C0, C0, T1, 0 // tr = sbox(tr)
saes32.encs C0, C0, T1, 1 //
saes32.encs C0, C0, T1, 2 //
saes32.encs C0, C0, T1, 3 //
aes32esi C0, C0, T1, 0 // tr = sbox(tr)
aes32esi C0, C0, T1, 1 //
aes32esi C0, C0, T1, 2 //
aes32esi C0, C0, T1, 3 //

xor C1, C1, C0 // C1 ^= C0
xor C2, C2, C1 // C1 ^= C0
Expand Down Expand Up @@ -110,15 +110,15 @@ aes_128_dec_key_schedule: // a0 - uint32_t rk [AES_128_RK_WORDS]

lw T0, 0(RKP) // Load key word

saes32.encs T1, zero, T0, 0 // Sub Word Forward
saes32.encs T1, T1 , T0, 1
saes32.encs T1, T1 , T0, 2
saes32.encs T1, T1 , T0, 3
aes32esi T1, zero, T0, 0 // Sub Word Forward
aes32esi T1, T1 , T0, 1
aes32esi T1, T1 , T0, 2
aes32esi T1, T1 , T0, 3

saes32.decsm T0, zero, T1, 0 // Sub Word Inverse & Inverse MixColumns
saes32.decsm T0, T0 , T1, 1
saes32.decsm T0, T0 , T1, 2
saes32.decsm T0, T0 , T1, 3
aes32dsmi T0, zero, T1, 0 // Sub Word Inverse & Inverse MixColumns
aes32dsmi T0, T0 , T1, 1
aes32dsmi T0, T0 , T1, 2
aes32dsmi T0, T0 , T1, 3

sw T0, 0(RKP) // Store key word.

Expand Down
24 changes: 12 additions & 12 deletions benchmarks/aes/zscrypto_rv32/aes_192_ks.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -67,10 +67,10 @@ aes_192_enc_key_schedule: // a0 - uint32_t rk [AES_192_RK_WORDS]
xor C0, C0, RCT // c0 ^= rcp

ROR32I T1, T2, C5, 8 // tr = ROR32(c3, 8)
saes32.encs C0, C0, T1, 0 // tr = sbox(tr)
saes32.encs C0, C0, T1, 1 //
saes32.encs C0, C0, T1, 2 //
saes32.encs C0, C0, T1, 3 //
aes32esi C0, C0, T1, 0 // tr = sbox(tr)
aes32esi C0, C0, T1, 1 //
aes32esi C0, C0, T1, 2 //
aes32esi C0, C0, T1, 3 //

xor C1, C1, C0 // C1 ^= C0
xor C2, C2, C1 // C2 ^= C1
Expand Down Expand Up @@ -122,15 +122,15 @@ aes_192_dec_key_schedule: // a0 - uint32_t rk [AES_192_RK_WORDS]

lw T0, 0(RKP) // Load key word

saes32.encs T1, zero, T0, 0 // Sub Word Forward
saes32.encs T1, T1 , T0, 1
saes32.encs T1, T1 , T0, 2
saes32.encs T1, T1 , T0, 3
aes32esi T1, zero, T0, 0 // Sub Word Forward
aes32esi T1, T1 , T0, 1
aes32esi T1, T1 , T0, 2
aes32esi T1, T1 , T0, 3

saes32.decsm T0, zero, T1, 0 // Sub Word Inverse & Inverse MixColumns
saes32.decsm T0, T0 , T1, 1
saes32.decsm T0, T0 , T1, 2
saes32.decsm T0, T0 , T1, 3
aes32dsmi T0, zero, T1, 0 // Sub Word Inverse & Inverse MixColumns
aes32dsmi T0, T0 , T1, 1
aes32dsmi T0, T0 , T1, 2
aes32dsmi T0, T0 , T1, 3

sw T0, 0(RKP) // Store key word.

Expand Down
32 changes: 16 additions & 16 deletions benchmarks/aes/zscrypto_rv32/aes_256_ks.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -71,10 +71,10 @@ aes_256_enc_key_schedule: // a0 - uint32_t rk [AES_256_RK_WORDS]
xor C0, C0, RCT // c0 ^= rcp

ROR32I T1, T2, C7, 8 // tr = ROR32(c3, 8)
saes32.encs C0, C0, T1, 0 // tr = sbox(tr)
saes32.encs C0, C0, T1, 1 //
saes32.encs C0, C0, T1, 2 //
saes32.encs C0, C0, T1, 3 //
aes32esi C0, C0, T1, 0 // tr = sbox(tr)
aes32esi C0, C0, T1, 1 //
aes32esi C0, C0, T1, 2 //
aes32esi C0, C0, T1, 3 //

xor C1, C1, C0 // C1 ^= C0
xor C2, C2, C1 // C2 ^= C1
Expand All @@ -87,10 +87,10 @@ aes_256_enc_key_schedule: // a0 - uint32_t rk [AES_256_RK_WORDS]

beq RKE, RKP, .aes_256_enc_ks_finish

saes32.encs C4, C4, C3, 0 // tr = sbox(tr)
saes32.encs C4, C4, C3, 1 //
saes32.encs C4, C4, C3, 2 //
saes32.encs C4, C4, C3, 3 //
aes32esi C4, C4, C3, 0 // tr = sbox(tr)
aes32esi C4, C4, C3, 1 //
aes32esi C4, C4, C3, 2 //
aes32esi C4, C4, C3, 3 //

xor C5, C5, C4 // C5 ^= C4
xor C6, C6, C5 // C6 ^= C5
Expand Down Expand Up @@ -140,15 +140,15 @@ aes_256_dec_key_schedule: // a0 - uint32_t rk [AES_256_RK_WORDS]

lw T0, 0(RKP) // Load key word

saes32.encs T1, zero, T0, 0 // Sub Word Forward
saes32.encs T1, T1 , T0, 1
saes32.encs T1, T1 , T0, 2
saes32.encs T1, T1 , T0, 3
aes32esi T1, zero, T0, 0 // Sub Word Forward
aes32esi T1, T1 , T0, 1
aes32esi T1, T1 , T0, 2
aes32esi T1, T1 , T0, 3

saes32.decsm T0, zero, T1, 0 // Sub Word Inverse & Inverse MixColumns
saes32.decsm T0, T0 , T1, 1
saes32.decsm T0, T0 , T1, 2
saes32.decsm T0, T0 , T1, 3
aes32dsmi T0, zero, T1, 0 // Sub Word Inverse & Inverse MixColumns
aes32dsmi T0, T0 , T1, 1
aes32dsmi T0, T0 , T1, 2
aes32dsmi T0, T0 , T1, 3

sw T0, 0(RKP) // Store key word.

Expand Down
114 changes: 57 additions & 57 deletions benchmarks/aes/zscrypto_rv32/aes_dec.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -61,25 +61,25 @@ aes_ecb_decrypt: // a2 - uint32_t * rk,
lw U2, 24(KP)
lw U3, 28(KP)

saes32.decsm U0, U0, T0, 0 // Even Round
saes32.decsm U0, U0, T3, 1
saes32.decsm U0, U0, T2, 2
saes32.decsm U0, U0, T1, 3
saes32.decsm U1, U1, T1, 0
saes32.decsm U1, U1, T0, 1
saes32.decsm U1, U1, T3, 2
saes32.decsm U1, U1, T2, 3
saes32.decsm U2, U2, T2, 0
saes32.decsm U2, U2, T1, 1
saes32.decsm U2, U2, T0, 2
saes32.decsm U2, U2, T3, 3
saes32.decsm U3, U3, T3, 0
saes32.decsm U3, U3, T2, 1
saes32.decsm U3, U3, T1, 2
saes32.decsm U3, U3, T0, 3 // U* contains new state
aes32dsmi U0, U0, T0, 0 // Even Round
aes32dsmi U0, U0, T3, 1
aes32dsmi U0, U0, T2, 2
aes32dsmi U0, U0, T1, 3

aes32dsmi U1, U1, T1, 0
aes32dsmi U1, U1, T0, 1
aes32dsmi U1, U1, T3, 2
aes32dsmi U1, U1, T2, 3

aes32dsmi U2, U2, T2, 0
aes32dsmi U2, U2, T1, 1
aes32dsmi U2, U2, T0, 2
aes32dsmi U2, U2, T3, 3

aes32dsmi U3, U3, T3, 0
aes32dsmi U3, U3, T2, 1
aes32dsmi U3, U3, T1, 2
aes32dsmi U3, U3, T0, 3 // U* contains new state

lw T0, 0(KP) // Load Round Key
lw T1, 4(KP)
Expand All @@ -89,49 +89,49 @@ aes_ecb_decrypt: // a2 - uint32_t * rk,
beq RK, KP, .aes_dec_block_l_finish // Break from loop
addi KP, KP, -32 // Step Key pointer

saes32.decsm T0, T0, U0, 0 // Odd Round
saes32.decsm T0, T0, U3, 1
saes32.decsm T0, T0, U2, 2
saes32.decsm T0, T0, U1, 3
saes32.decsm T1, T1, U1, 0
saes32.decsm T1, T1, U0, 1
saes32.decsm T1, T1, U3, 2
saes32.decsm T1, T1, U2, 3
saes32.decsm T2, T2, U2, 0
saes32.decsm T2, T2, U1, 1
saes32.decsm T2, T2, U0, 2
saes32.decsm T2, T2, U3, 3
saes32.decsm T3, T3, U3, 0
saes32.decsm T3, T3, U2, 1
saes32.decsm T3, T3, U1, 2
saes32.decsm T3, T3, U0, 3 // T* contains new state
aes32dsmi T0, T0, U0, 0 // Odd Round
aes32dsmi T0, T0, U3, 1
aes32dsmi T0, T0, U2, 2
aes32dsmi T0, T0, U1, 3

aes32dsmi T1, T1, U1, 0
aes32dsmi T1, T1, U0, 1
aes32dsmi T1, T1, U3, 2
aes32dsmi T1, T1, U2, 3

aes32dsmi T2, T2, U2, 0
aes32dsmi T2, T2, U1, 1
aes32dsmi T2, T2, U0, 2
aes32dsmi T2, T2, U3, 3

aes32dsmi T3, T3, U3, 0
aes32dsmi T3, T3, U2, 1
aes32dsmi T3, T3, U1, 2
aes32dsmi T3, T3, U0, 3 // T* contains new state

j .aes_dec_block_l0 // repeat loop

.aes_dec_block_l_finish:

saes32.decs T0, T0, U0, 0 // Final round, no MixColumns
saes32.decs T0, T0, U3, 1
saes32.decs T0, T0, U2, 2
saes32.decs T0, T0, U1, 3
saes32.decs T1, T1, U1, 0
saes32.decs T1, T1, U0, 1
saes32.decs T1, T1, U3, 2
saes32.decs T1, T1, U2, 3
saes32.decs T2, T2, U2, 0
saes32.decs T2, T2, U1, 1
saes32.decs T2, T2, U0, 2
saes32.decs T2, T2, U3, 3
saes32.decs T3, T3, U3, 0
saes32.decs T3, T3, U2, 1
saes32.decs T3, T3, U1, 2
saes32.decs T3, T3, U0, 3 // T* contains new state
aes32dsi T0, T0, U0, 0 // Final round, no MixColumns
aes32dsi T0, T0, U3, 1
aes32dsi T0, T0, U2, 2
aes32dsi T0, T0, U1, 3

aes32dsi T1, T1, U1, 0
aes32dsi T1, T1, U0, 1
aes32dsi T1, T1, U3, 2
aes32dsi T1, T1, U2, 3

aes32dsi T2, T2, U2, 0
aes32dsi T2, T2, U1, 1
aes32dsi T2, T2, U0, 2
aes32dsi T2, T2, U3, 3

aes32dsi T3, T3, U3, 0
aes32dsi T3, T3, U2, 1
aes32dsi T3, T3, U1, 2
aes32dsi T3, T3, U0, 3 // T* contains new state

AES_DUMP_STATE T0, T1, T2, T3, PT

Expand Down
96 changes: 48 additions & 48 deletions benchmarks/aes/zscrypto_rv32/aes_enc.S
View file
Original file line number Diff line number Diff line change
Expand Up @@ -61,25 +61,25 @@ aes_ecb_encrypt: // a2 - uint32_t * rk,
lw U2, 24(RK)
lw U3, 28(RK)

saes32.encsm U0, U0, T0, 0 // Even Round
saes32.encsm U0, U0, T1, 1
saes32.encsm U0, U0, T2, 2
saes32.encsm U0, U0, T3, 3
aes32esmi U0, U0, T0, 0 // Even Round
aes32esmi U0, U0, T1, 1
aes32esmi U0, U0, T2, 2
aes32esmi U0, U0, T3, 3

saes32.encsm U1, U1, T1, 0
saes32.encsm U1, U1, T2, 1
saes32.encsm U1, U1, T3, 2
saes32.encsm U1, U1, T0, 3
aes32esmi U1, U1, T1, 0
aes32esmi U1, U1, T2, 1
aes32esmi U1, U1, T3, 2
aes32esmi U1, U1, T0, 3

saes32.encsm U2, U2, T2, 0
saes32.encsm U2, U2, T3, 1
saes32.encsm U2, U2, T0, 2
saes32.encsm U2, U2, T1, 3
aes32esmi U2, U2, T2, 0
aes32esmi U2, U2, T3, 1
aes32esmi U2, U2, T0, 2
aes32esmi U2, U2, T1, 3

saes32.encsm U3, U3, T3, 0
saes32.encsm U3, U3, T0, 1
saes32.encsm U3, U3, T1, 2
saes32.encsm U3, U3, T2, 3 // U* contains new state
aes32esmi U3, U3, T3, 0
aes32esmi U3, U3, T0, 1
aes32esmi U3, U3, T1, 2
aes32esmi U3, U3, T2, 3 // U* contains new state

lw T0, 32(RK) // Load Round Key
lw T1, 36(RK)
Expand All @@ -89,49 +89,49 @@ aes_ecb_encrypt: // a2 - uint32_t * rk,
addi RK, RK, 32 // Step Key pointer
beq RK, KP, .aes_enc_block_l_finish // Break from loop

saes32.encsm T0, T0, U0, 0 // Odd Round
saes32.encsm T0, T0, U1, 1
saes32.encsm T0, T0, U2, 2
saes32.encsm T0, T0, U3, 3
aes32esmi T0, T0, U0, 0 // Odd Round
aes32esmi T0, T0, U1, 1
aes32esmi T0, T0, U2, 2
aes32esmi T0, T0, U3, 3

saes32.encsm T1, T1, U1, 0
saes32.encsm T1, T1, U2, 1
saes32.encsm T1, T1, U3, 2
saes32.encsm T1, T1, U0, 3
aes32esmi T1, T1, U1, 0
aes32esmi T1, T1, U2, 1
aes32esmi T1, T1, U3, 2
aes32esmi T1, T1, U0, 3

saes32.encsm T2, T2, U2, 0
saes32.encsm T2, T2, U3, 1
saes32.encsm T2, T2, U0, 2
saes32.encsm T2, T2, U1, 3
aes32esmi T2, T2, U2, 0
aes32esmi T2, T2, U3, 1
aes32esmi T2, T2, U0, 2
aes32esmi T2, T2, U1, 3

saes32.encsm T3, T3, U3, 0
saes32.encsm T3, T3, U0, 1
saes32.encsm T3, T3, U1, 2
saes32.encsm T3, T3, U2, 3 // T* contains new state
aes32esmi T3, T3, U3, 0
aes32esmi T3, T3, U0, 1
aes32esmi T3, T3, U1, 2
aes32esmi T3, T3, U2, 3 // T* contains new state

j .aes_enc_block_l0 // repeat loop

.aes_enc_block_l_finish:

saes32.encs T0, T0, U0, 0 // Final round. No MixColumn.
saes32.encs T0, T0, U1, 1
saes32.encs T0, T0, U2, 2
saes32.encs T0, T0, U3, 3
aes32esi T0, T0, U0, 0 // Final round. No MixColumn.
aes32esi T0, T0, U1, 1
aes32esi T0, T0, U2, 2
aes32esi T0, T0, U3, 3

saes32.encs T1, T1, U1, 0
saes32.encs T1, T1, U2, 1
saes32.encs T1, T1, U3, 2
saes32.encs T1, T1, U0, 3
aes32esi T1, T1, U1, 0
aes32esi T1, T1, U2, 1
aes32esi T1, T1, U3, 2
aes32esi T1, T1, U0, 3

saes32.encs T2, T2, U2, 0
saes32.encs T2, T2, U3, 1
saes32.encs T2, T2, U0, 2
saes32.encs T2, T2, U1, 3
aes32esi T2, T2, U2, 0
aes32esi T2, T2, U3, 1
aes32esi T2, T2, U0, 2
aes32esi T2, T2, U1, 3

saes32.encs T3, T3, U3, 0
saes32.encs T3, T3, U0, 1
saes32.encs T3, T3, U1, 2
saes32.encs T3, T3, U2, 3 // T* contains new state
aes32esi T3, T3, U3, 0
aes32esi T3, T3, U0, 1
aes32esi T3, T3, U1, 2
aes32esi T3, T3, U2, 3 // T* contains new state

AES_DUMP_STATE T0, T1, T2, T3, CT

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