vtype register layout
| Bits | Name | Description |
|---|---|---|
XLEN-1 |
vill |
Illegal value if set |
XLEN-2:10 |
Reserved (write 0) |
|
9:8 |
vediv[1:0] |
Used by EDIV extension |
7 |
vma |
Mask agnostic |
6 |
vta |
Tail agnostic |
5:3 |
vsew[2:0] |
Selected element width (SEW) setting |
2:0 |
vlmul[2:0] |
Vector register group multiplier (LMUL) setting |