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resolve typos and other doc generation problems
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tariqkurd-repo committed Sep 2, 2022
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150 changes: 74 additions & 76 deletions Zc-specification/Zc.adoc
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@@ -1,13 +1,14 @@
:sectnums:
[#Zc]
== Zc* v1.0.0-RC4
== Zc* v1.0.0-RC4.1

=== Change history since v0.70.1 (tagged release)

.Change history
[width="100%",options=header]
|====================================================================================
|Version | change
|v1.0.0-RC4.1| Resolve typographical issues with the document only, no actual changes
|v1.0.0-RC4| Release candidate
| | Remove Zcmb as benefit is low. Remove cm.jalt, read LSB of jump table entry to determine whether to link
|v0.70.5 | Resolve https://github.com/riscv/riscv-code-size-reduction/issues/163 - jvt.base is WARL and fewer bits than the max can be implemented
Expand All @@ -31,50 +32,50 @@ Zc* is a group of extensions which define subsets of the existing C extension (Z
Zcm* all reuse the encodings for _c.fld_, _c.fsd_, _c.fldsp_, _c.fsdsp_.

.Zc* extension overview
[width="100%",options=header]
[width="100%",options=header,cols="3,1,1,1,1,1,1,1"]
|====================================================================================
|Instruction |Zca |Zcf |Zcd |Zcb |Zcmp |Zcmpe |Zcmt
8+|*The Zca extension is added as way to refer to instructions in the C extension that do not include the floating-point loads and stores*
|C excl. c.f* |✓| | | | | |
|C excl. c.f* |yes | | | | | |
8+|*The Zcf extension is added as a way to refer to compressed single-precision floating-point load/stores*
|c.flw | |✓| | | | |
|c.flwsp | |✓| | | | |
|c.fsw | |✓| | | | |
|c.fswsp | |✓| | | | |
|c.flw | |yes | | | | |
|c.flwsp | |yes | | | | |
|c.fsw | |yes | | | | |
|c.fswsp | |yes | | | | |
8+|*The Zcd extension is added as a way to refer to compressed double-precision floating-point load/stores*
|c.fld | | |✓| | | |
|c.fldsp | | |✓| | | |
|c.fsd | | |✓| | | |
|c.fsdsp | | |✓| | | |
|c.fld | | |yes | | | |
|c.fldsp | | |yes | | | |
|c.fsd | | |yes | | | |
|c.fsdsp | | |yes | | | |
8+|*Simple operations for use on all architectures*
|c.lbu | | | |✓| | |
|c.lh | | | |✓| | |
|c.lhu | | | |✓| | |
|c.sb | | | |✓| | |
|c.sh | | | |✓| | |
|c.zext.b | | | |✓| | |
|c.sext.b | | | |✓| | |
|c.zext.h | | | |✓| | |
|c.sext.h | | | |✓| | |
|c.zext.w | | | |✓| | |
|c.mul | | | |✓| | |
|c.not | | | |✓| | |
|c.lbu | | | |yes | | |
|c.lh | | | |yes | | |
|c.lhu | | | |yes | | |
|c.sb | | | |yes | | |
|c.sh | | | |yes | | |
|c.zext.b | | | |yes | | |
|c.sext.b | | | |yes | | |
|c.zext.h | | | |yes | | |
|c.sext.h | | | |yes | | |
|c.zext.w | | | |yes | | |
|c.mul | | | |yes | | |
|c.not | | | |yes | | |
8+|*PUSH/POP and double move which overlap with _c.fsdsp_*
|cm.push | | | | |✓|✓|
|cm.pop | | | | |✓|✓|
|cm.popret | | | | |✓|✓|
|cm.popretz | | | | |✓|✓|
|cm.mva01s | | | | |✓| |
|cm.mvsa01 | | | | |✓| |
|cm.push | | | | |yes |yes |
|cm.pop | | | | |yes |yes |
|cm.popret | | | | |yes |yes |
|cm.popretz | | | | |yes |yes |
|cm.mva01s | | | | |yes | |
|cm.mvsa01 | | | | |yes | |
8+|*Reserved for EABI versions of PUSH/POP and double move which overlap with _c.fsdsp_*
|cm.push.e | | | | | |✓|
|cm.pop.e | | | | | |✓|
|cm.popret.e | | | | | |✓|
|cm.popretz.e | | | | | |✓|
|cm.mva01s.e | | | | | |✓|
|cm.mvsa01.e | | | | | |✓|
|cm.push.e | | | | | |yes |
|cm.pop.e | | | | | |yes |
|cm.popret.e | | | | | |yes |
|cm.popretz.e | | | | | |yes |
|cm.mva01s.e | | | | | |yes |
|cm.mvsa01.e | | | | | |yes |
8+|*Table jump*
|cm.jalt | | | | | |✓
|cm.jalt | | | | | | |yes
|====================================================================================

[#Zca]
Expand Down Expand Up @@ -102,9 +103,6 @@ Zcd is the existing set of compressed double precision floating point loads and

Zcd requires the <<Zca>> extension.


<<<

[#Zcb]
=== Zcb

Expand All @@ -127,63 +125,63 @@ The _c.mul_ encoding uses the CR register format along with other instructions s
|Mnemonic
|Instruction

|&#10003;
|&#10003;
|yes
|yes
|c.lbu _rd'_, uimm(_rs1'_)
|<<#insns-c_lbu>>

|&#10003;
|&#10003;
|yes
|yes
|c.lhu _rd'_, uimm(_rs1'_)
|<<#insns-c_lhu>>

|&#10003;
|&#10003;
|yes
|yes
|c.lh _rd'_, uimm(_rs1'_)
|<<#insns-c_lh>>

|&#10003;
|&#10003;
|yes
|yes
|c.sb _rs2'_, uimm(_rs1'_)
|<<#insns-c_sb>>

|&#10003;
|&#10003;
|yes
|yes
|c.sh _rs2'_, uimm(_rs1'_)
|<<#insns-c_sh>>

|&#10003;
|&#10003;
|yes
|yes
|c.zext.b _rsd'_
|<<#insns-c_zext_b>>

|&#10003;
|&#10003;
|yes
|yes
|c.sext.b _rsd'_
|<<#insns-c_sext_b>>

|&#10003;
|&#10003;
|yes
|yes
|c.zext.h _rsd'_
|<<#insns-c_zext_h>>

|&#10003;
|&#10003;
|yes
|yes
|c.sext.h _rsd'_
|<<#insns-c_sext_h>>

|
|&#10003;
|yes
|c.zext.w _rsd'_
|<<#insns-c_zext_w>>

|&#10003;
|&#10003;
|yes
|yes
|c.not _rsd'_
|<<#insns-c_not>>

|&#10003;
|&#10003;
|yes
|yes
|c.mul _rsd'_, _rs2'_
|<<#insns-c_mul>>

Expand Down Expand Up @@ -216,33 +214,33 @@ The PUSH/POP assembly syntax uses several variables, the meaning of which are:
|Mnemonic
|Instruction

|&#10003;
|&#10003;
|yes
|yes
|cm.push _{reg_list}, -stack_adj_
|<<#insns-cm_push>>

|&#10003;
|&#10003;
|yes
|yes
|cm.pop _{reg_list}, stack_adj_
|<<#insns-cm_pop>>

|&#10003;
|&#10003;
|yes
|yes
|cm.popret _{reg_list}, stack_adj_
|<<#insns-cm_popret>>

|&#10003;
|&#10003;
|yes
|yes
|cm.popretz _{reg_list}, stack_adj_
|<<#insns-cm_popretz>>

|&#10003;
|&#10003;
|yes
|yes
|cm.mva01s _sreg1, sreg2_
|<<#insns-cm_mva01s>>

|&#10003;
|&#10003;
|yes
|yes
|cm.mvsa01 _sreg1, sreg2_
|<<#insns-cm_mvsa01>>

Expand Down Expand Up @@ -282,8 +280,8 @@ Zcmt requires the <<Zca>> extension.
|Mnemonic
|Instruction

|&#10003;
|&#10003;
|yes
|yes
|cm.jalt _index_
|<<#insns-cm_jalt>>

Expand Down
2 changes: 1 addition & 1 deletion Zc-specification/Zcb_footer.adoc
View file
Expand Up @@ -7,6 +7,6 @@ Included in::
|Lifecycle state

|Zcb (<<Zcb>>)
|v1.0.0-RC3
|v1.0.0-RC4.1
|Stable
|===
2 changes: 1 addition & 1 deletion Zc-specification/Zcf_footer.adoc
View file
Expand Up @@ -7,6 +7,6 @@ Included in::
|Lifecycle state

|Zcf (<<Zcf>>)
|v1.0.0-RC4
|v1.0.0-RC4.1
|Frozen
|===
2 changes: 1 addition & 1 deletion Zc-specification/Zcmp_footer.adoc
View file
Expand Up @@ -7,6 +7,6 @@ Included in::
|Lifecycle state

|Zcmp (<<Zcmp>>)
|v1.0.0-RC3
|v1.0.0-RC4.1
|Stable
|===
2 changes: 1 addition & 1 deletion Zc-specification/Zcmpe_footer.adoc
View file
Expand Up @@ -7,6 +7,6 @@ Included in::
|Lifecycle state

|Zcmpe (<<Zcmpe>>)
|v1.0.0-RC4
|v1.0.0-RC4.1
|Stable
|===
2 changes: 1 addition & 1 deletion Zc-specification/Zcmt_footer.adoc
View file
Expand Up @@ -7,6 +7,6 @@ Included in::
|Lifecycle state

|Zcmt (<<Zcmt>>)
|v1.0.0-RC4
|v1.0.0-RC4.1
|Frozen
|===
6 changes: 3 additions & 3 deletions Zc-specification/tablejump.adoc
View file
Expand Up @@ -9,16 +9,16 @@ Table jump uses a 256-entry UXLEN wide table in instruction memory to contain fu
and a flag in bit zero of each entry indicating whether jumping to the function address should link or not.
The table must be a minimum of 64-byte aligned.

_cm./jalt_ encodings index the table, giving access to functions within the full UXLEN wide address space.
_cm.jalt_ encodings index the table, giving access to functions within the full UXLEN wide address space.

This is used as a form of dictionary compression used to reduce the code size of _jal_ / _auipc+jalr_ / _jr_ / _auipc+jr_ instructions.

Table jump allows the linker to replace the following instruction sequences with a _cm.jalt_ encoding, and an entry in the table:

* 32-bit _j_ calls
* 32-bit _jal_ ra calls
* 64-bit _auipc/jalr_ calls to fixed locations
* 64-bit _auipc/jalr ra_ calls to fixed locations
* 64-bit _auipc+jr_ calls to fixed locations
* 64-bit _auipc+jalr ra_ calls to fixed locations
** The _auipc+jr/jalr_ sequence is used because the offset from the PC is out of the ±1MB range.
=== JVT
Expand Down

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