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ipq807x: add thermal cooling support
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Since IPQ8074 now has support for thermal sensors and CPU Freq for scaling
the utilize those in order to provide passive cooling utilizing throttling
via CPU Freq.

Since HK and AC have different trip points as well as OPP points add their
maps and trips to respective DTSI.

Signed-off-by: Robert Marko <robimarko@gmail.com>
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robimarko committed Apr 4, 2022
1 parent f295931 commit db59dfd
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Showing 4 changed files with 385 additions and 0 deletions.
3 changes: 3 additions & 0 deletions target/linux/ipq807x/config-5.15
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Original file line number Diff line number Diff line change
Expand Up @@ -74,11 +74,13 @@ CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_STAT is not set
CONFIG_CPU_FREQ_THERMAL=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_THERMAL=y
CONFIG_CRC16=y
CONFIG_CRC8=y
CONFIG_CRYPTO_AUTHENC=y
Expand Down Expand Up @@ -410,6 +412,7 @@ CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SCHED_CORE is not set
CONFIG_SCHED_MC=y
CONFIG_SCHED_SMT=y
CONFIG_SCHED_THERMAL_PRESSURE=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SCSI_LOWLEVEL is not set
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132 changes: 132 additions & 0 deletions target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-ac-cpu.dtsi
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Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only

#include <dt-bindings/thermal/thermal.h>

&CPU0 {
operating-points-v2 = <&cpu_opp_table>;
};
Expand Down Expand Up @@ -33,3 +35,133 @@
};
};
};

&cpu0_thermal {
trips {
cpu0_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu0_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu0_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cpu1_thermal {
trips {
cpu1_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu1_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cpu2_thermal {
trips {
cpu2_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu2_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu2_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cpu3_thermal {
trips {
cpu3_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu3_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cluster_thermal {
trips {
cluster_passive: cluster-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cluster_crit: cluster_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cluster_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
197 changes: 197 additions & 0 deletions target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-hk-cpu.dtsi
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Original file line number Diff line number Diff line change
@@ -1,5 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only

#include <dt-bindings/thermal/thermal.h>

&CPU0 {
operating-points-v2 = <&cpu_opp_table>;
};
Expand Down Expand Up @@ -53,3 +55,198 @@
};
};
};

&cpu0_thermal {
trips {
cpu0_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu0_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};

cpu0_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu0_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu0_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cpu1_thermal {
trips {
cpu1_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu1_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};

cpu1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu1_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu1_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cpu2_thermal {
trips {
cpu2_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu2_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};

cpu2_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu2_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu2_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cpu3_thermal {
trips {
cpu3_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cpu3_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};

cpu3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cpu3_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu3_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

&cluster_thermal {
trips {
cluster_passive_low: cluster-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};

cluster_passive_high: cluster-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};

cluster_crit: cluster_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};

cooling-maps {
map0 {
trip = <&cluster_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cluster_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

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