SPU/SYSINFO: Disable TSX by default for TSX-FA cpus #11105
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- Also detect the new RTM_ALWAYS_ABORT bit in cpuid - This new bit indicates that RTM is disabled in the microcode - On cpus with RTM_ALWAYS_ABORT TSX can be renabled by writing 0x4 to the msr 0x0000010F
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Hi Whatcookie ! |
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I have no idea |
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Since stability and performance aren't ideal on cpus with TSX-FA, let's just disable it by default. It can be force enabled via the forced option, just like with haswell and TSX.
Additionally, support detecting the new RTM_ALWAYS_ABORT bit in cpuid. This is a new bit that only appears in new microcodes with disabled TSX. (see this commit for details torvalds/linux@1348924)
When TSX is disabled via this new microcode it can be re-enabled by writing 0x4 to the msr 0x0000010F. When enabled in this way, the performance of TSX seems to be the same as the pre TSX-FA microcodes. Intel has also removed the need for TSX to clobber the perfomance counters when TSX is in use (which perhaps indicates that intel removed their "workaround" for TSX bugs in this microcode?)
Intel says
This bit is intended to be used on developer systems. If this bit is set, transactional atomicity correctness is not certain.So, expect bugs, and don't use it unless you're a "Developer".