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PPUDisAsm: Fix MFSPR/MTSPR disassembly #11019

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merged 1 commit into from Oct 16, 2021
Merged

PPUDisAsm: Fix MFSPR/MTSPR disassembly #11019

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4 changes: 2 additions & 2 deletions rpcs3/Emu/Cell/PPUDisAsm.cpp
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Expand Up @@ -2067,7 +2067,7 @@ void PPUDisAsm::MFSPR(ppu_opcode_t op)
case 0x001: DisAsm_R1("mfxer", op.rd); break;
case 0x008: DisAsm_R1("mflr", op.rd); break;
case 0x009: DisAsm_R1("mfctr", op.rd); break;
default: DisAsm_R1_IMM("mfspr", op.rd, op.spr); break;
default: DisAsm_R1_IMM("mfspr", op.rd, n); break;
}
}

Expand Down Expand Up @@ -2175,7 +2175,7 @@ void PPUDisAsm::MTSPR(ppu_opcode_t op)
case 0x001: DisAsm_R1("mtxer", op.rs); break;
case 0x008: DisAsm_R1("mtlr", op.rs); break;
case 0x009: DisAsm_R1("mtctr", op.rs); break;
default: DisAsm_IMM_R1("mtspr", op.spr, op.rs); break;
default: DisAsm_R1_IMM("mtspr", n, op.rs); break;
}
}

Expand Down
14 changes: 7 additions & 7 deletions rpcs3/Emu/Cell/PPUDisAsm.h
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Expand Up @@ -72,15 +72,15 @@ class PPUDisAsm final : public PPCDisAsm
}
void DisAsm_INT1_R2(std::string_view op, u32 i0, u32 r0, u32 r1)
{
fmt::append(last_opcode, "%-*s%d,r%d,r%d", PadOp(), op, i0, r0, r1);
fmt::append(last_opcode, "%-*s %d,r%d,r%d", PadOp(), op, i0, r0, r1);
}
void DisAsm_INT1_R1_IMM(std::string_view op, u32 i0, u32 r0, s32 imm0)
{
fmt::append(last_opcode, "%-*s%d,r%d,%s", PadOp(), op, i0, r0, SignedHex(imm0));
fmt::append(last_opcode, "%-*s %d,r%d,%s", PadOp(), op, i0, r0, SignedHex(imm0));
}
void DisAsm_INT1_R1_RC(std::string_view op, u32 i0, u32 r0, u32 rc)
{
fmt::append(last_opcode, "%-*s%d,r%d", PadOp(op, rc ? 1 : 0), op, i0, r0);
fmt::append(last_opcode, "%-*s %d,r%d", PadOp(op, rc ? 1 : 0), op, i0, r0);
insert_char_if(op, !!rc);
}
void DisAsm_INT1_R1(std::string_view op, u32 i0, u32 r0)
Expand Down Expand Up @@ -224,7 +224,7 @@ class PPUDisAsm final : public PPCDisAsm
}
void DisAsm_IMM_R1(std::string_view op, s32 imm0, u32 r0)
{
fmt::append(last_opcode, "%-*s%d,r%d #%x", PadOp(), op, imm0, r0, imm0);
fmt::append(last_opcode, "%-*s %d,r%d #%x", PadOp(), op, imm0, r0, imm0);
}
void DisAsm_CR1_R1_IMM(std::string_view op, u32 cr0, u32 r0, s32 imm0)
{
Expand Down Expand Up @@ -266,11 +266,11 @@ class PPUDisAsm final : public PPCDisAsm
}
void DisAsm_INT3(std::string_view op, const int i0, const int i1, const int i2)
{
fmt::append(last_opcode, "%-*s%d,%d,%d", PadOp(), op, i0, i1, i2);
fmt::append(last_opcode, "%-*s %d,%d,%d", PadOp(), op, i0, i1, i2);
}
void DisAsm_INT1(std::string_view op, const int i0)
{
fmt::append(last_opcode, "%-*s%d", PadOp(), op, i0);
fmt::append(last_opcode, "%-*s %d", PadOp(), op, i0);
}
void DisAsm_BRANCH(std::string_view op, const int pc)
{
Expand All @@ -282,7 +282,7 @@ class PPUDisAsm final : public PPCDisAsm
}
void DisAsm_B2_BRANCH(std::string_view op, u32 b0, u32 b1, const int pc)
{
fmt::append(last_opcode, "%-*s%d,%d,0x%x ", PadOp(), op, b0, b1, DisAsmBranchTarget(pc));
fmt::append(last_opcode, "%-*s %d,%d,0x%x ", PadOp(), op, b0, b1, DisAsmBranchTarget(pc));
}
void DisAsm_CR_BRANCH(std::string_view op, u32 cr, const int pc)
{
Expand Down