Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

SPU: Make GET's full and aligned cache line accesses atomic with Accurate DMA #8833

Merged
merged 3 commits into from Sep 4, 2020
Merged

SPU: Make GET's full and aligned cache line accesses atomic with Accurate DMA #8833

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
8e5ccf6
SPU: Make GET's full and aligned cache line accesses atomic with Acc…
elad335 Sep 3, 2020
7962ee4
SPU: Cleanup for Accurate PUTLLUC
elad335 Sep 4, 2020
c4b88b9
SPU: Make Accurate GETLLAR, PUTLLUC settings dynamically adjustable
elad335 Sep 4, 2020
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Jump to
Jump to file
Failed to load files.
Diff view
Diff view
5 changes: 0 additions & 5 deletions rpcs3/Emu/Cell/SPURecompiler.cpp
View file
Open in desktop
Expand Up @@ -5796,11 +5796,6 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
if (u64 cmdh = ci->getZExtValue() & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_RESULT_MASK); !g_use_rtm)
{
// TODO: don't require TSX (current implementation is TSX-only)
if (cmdh == MFC_GET_CMD && g_cfg.core.spu_accurate_putlluc)
{
break;
}

if (cmdh == MFC_PUT_CMD || cmdh == MFC_SNDSIG_CMD)
{
break;
Expand Down
8 changes: 4 additions & 4 deletions rpcs3/Emu/Cell/SPUThread.cpp
View file
Open in desktop
Expand Up @@ -1345,7 +1345,7 @@ void spu_thread::do_dma_transfer(const spu_mfc_cmd& args)
src = zero_buf;
}

if ((!g_use_rtm && (!is_get || g_cfg.core.spu_accurate_putlluc)) || g_cfg.core.spu_accurate_dma) [[unlikely]]
if ((!g_use_rtm && !is_get) || g_cfg.core.spu_accurate_dma) [[unlikely]]
{
for (u32 size = args.size, size0; is_get;
size -= size0, dst += size0, src += size0)
Expand All @@ -1370,8 +1370,8 @@ void spu_thread::do_dma_transfer(const spu_mfc_cmd& args)
{
const u64 time0 = vm::reservation_acquire(eal, size0);

// Ignore DMA lock bits
if (time0 & (127 & ~vm::dma_lockb))
// Ignore DMA lock bit on incomplete cache line accesses
if (time0 & (127 - (size0 != 128 ? vm::dma_lockb : 0)))
{
continue;
}
Expand Down Expand Up @@ -1422,7 +1422,7 @@ void spu_thread::do_dma_transfer(const spu_mfc_cmd& args)
}
}

if (time0 != vm::reservation_acquire(eal, size0))
if (time0 != vm::reservation_acquire(eal, size0) || (size0 == 128 && !cmp_rdata(*reinterpret_cast<decltype(spu_thread::rdata)*>(dst), *reinterpret_cast<const decltype(spu_thread::rdata)*>(src))))
{
continue;
}
Expand Down
4 changes: 2 additions & 2 deletions rpcs3/Emu/system_config.h
View file
Open in desktop
Expand Up @@ -42,8 +42,8 @@ struct cfg_root : cfg::node
cfg::_bool spu_loop_detection{ this, "SPU loop detection", true, true }; // Try to detect wait loops and trigger thread yield
cfg::_int<0, 6> max_spurs_threads{ this, "Max SPURS Threads", 6 }; // HACK. If less then 6, max number of running SPURS threads in each thread group.
cfg::_enum<spu_block_size_type> spu_block_size{ this, "SPU Block Size", spu_block_size_type::safe };
cfg::_bool spu_accurate_getllar{ this, "Accurate GETLLAR", false };
cfg::_bool spu_accurate_putlluc{ this, "Accurate PUTLLUC", false };
cfg::_bool spu_accurate_getllar{ this, "Accurate GETLLAR", false, true };
cfg::_bool spu_accurate_putlluc{ this, "Accurate PUTLLUC", false, true };
cfg::_bool spu_accurate_dma{ this, "Accurate SPU DMA", false };
cfg::_bool rsx_accurate_res_access{this, "Accurate RSX reservation access", false, true};
cfg::_bool spu_verification{ this, "SPU Verification", true }; // Should be enabled
Expand Down