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Add debug counter for ivar inline cache misses that could hit
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This commit adds a debug counter for the case where the inline cache
*missed* but the ivar index table has an entry for that ivar.  This is a
case where a polymorphic cache could help
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tenderlove committed Nov 9, 2020
1 parent f259906 commit 4219cb7
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Showing 2 changed files with 2 additions and 0 deletions.
1 change: 1 addition & 0 deletions debug_counter.h
Expand Up @@ -123,6 +123,7 @@ RB_DEBUG_COUNTER(ivar_set_ic_hit)
RB_DEBUG_COUNTER(ivar_set_ic_miss)
RB_DEBUG_COUNTER(ivar_set_ic_miss_serial)
RB_DEBUG_COUNTER(ivar_set_ic_miss_unset)
RB_DEBUG_COUNTER(ivar_set_ic_miss_iv_hit)
RB_DEBUG_COUNTER(ivar_set_ic_miss_noobject)
RB_DEBUG_COUNTER(ivar_get_base)
RB_DEBUG_COUNTER(ivar_set_base)
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1 change: 1 addition & 0 deletions vm_insnhelper.c
Expand Up @@ -1246,6 +1246,7 @@ vm_setivar(VALUE obj, ID id, VALUE val, const rb_iseq_t *iseq, IVC ic, const str
ptr = ROBJECT_IVPTR(obj);
}
RB_OBJ_WRITE(obj, &ptr[index], val);
RB_DEBUG_COUNTER_INC(ivar_set_ic_miss_iv_hit);

return val;
}
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