YJIT: Stack temp register allocation #7651
Merged
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This PR implements register allocation for stack temps. It currently works only on x86_64 and I'm working on arm64 support, but I'm filing this now to reduce the risks of conflict first.
Design
Opnd::InsnOut
in the future.asm.ccall
asserts that no register is allocated to stack temps at the time.reg_idx = stack_idx % num_regs
. So, given 5 registers,stack[0]
andstack[5]
share the same register.VALUE *
pointing to the stack.jit.peek_at_stack
, but they're reloaded by pop instructions and the next block can use registers again.--yjit-temp-regs
to control the number of assigned registers--yjit-temp-regs=5
to enable this feature, and--yjit-temp-regs=0
to disable this feature.--yjit-temp-regs=0
by default at least until we implement arm64 support.Benchmark
Here's the current performance:
Headline
This PR speeds up
activerecord
,hexapdf
,liquid-render
, andmail
by 4-5%.Other
Micro
Code size stats on railsbench and liquid-c
railsbench
before (regs=0)
after (regs=5)
liquid-c
before (regs=0)
after (regs=5)