YJIT: Merge csel and mov on arm64

[k0kubun]

This PR merges csel and mov on arm64 when the mov is just moving the InsnOut of csel to another register. The first commit does refactoring that is useful for this change, and the second commit does the optimization.

I don't see a significant impact on benchmarks, but this should help the stack temp register allocation performance #7659.

Example

before

  # Insn: 0003 opt_lt (stack_size: 2)
  0x110000098: cmp x1, x9
  0x11000009c: mov x11, #0x14
  0x1100000a0: mov x12, #0
  0x1100000a4: csel x11, x11, x12, lt
  0x1100000a8: mov x1, x11

after

  # Insn: 0003 opt_lt (stack_size: 2)
  0x104720098: cmp x1, x9
  0x10472009c: mov x11, #0x14
  0x1047200a0: mov x12, #0
  0x1047200a4: csel x1, x11, x12, lt