mips64-unknown-linux-gnuabi64 assumes hard float support.

[jkilpatr]

ldc1 is a MIPS FPU instruction. I'm running on a Cavium Octeon (ubiquiti edge router lite with OpenWRT) that has no FPU. Arm has a hard float target and a soft float target, does that need to be implemented here as well or should I pass some flag to LLVM?

``

│0xaaabaac4c0 <num_bigint::biguint::from_radix_digits_be+472> ldc1 $f0,312(sp) │
│0xaaabaac4c4 <num_bigint::biguint::from_radix_digits_be+476> ld v0,288(sp) │
│0xaaabaac4c8 <num_bigint::biguint::from_radix_digits_be+480> ld v1,-32296(v0) │
│0xaaabaac4cc <num_bigint::biguint::from_radix_digits_be+484> ldc1 $f1,4464(v1) │
│0xaaabaac4d0 <num_bigint::biguint::from_radix_digits_be+488> sub.d $f12,$f0,$f1 │
│0xaaabaac4d4 <num_bigint::biguint::from_radix_digits_be+492> ld v1,-31744(v0) │
│0xaaabaac4d8 <num_bigint::biguint::from_radix_digits_be+496> daddiu t9,v1,1696

[workingjubilee]

mips64-openwrt-linux-musl now exists, which offers a template to follow that satisfies most of the requirements here, and adding new targets has a fairly well-defined process. Thus I am going to close this.

[Alexhuszagh]

This still doesn't solve the original issue, however: mips64-unknown-linux-gnuabi64 and other targets are supposed to support soft-float, and the actual target has different specs:

For mips64-unknown-linux-muslabi64:

$ rustc +nightly --print target-features -Z unstable-options --target mips64-unknown-linux-muslabi64
Features supported by rustc for this target:
    fp64                     - Support 64-bit FP registers.
    msa                      - Mips MSA ASE.
    crt-static               - Enables C Run-time Libraries to be statically linked.

Code-generation features supported by LLVM for this target:
...
    nomadd4                  - Disable 4-operand madd.fmt and related instructions.
    nooddspreg               - Disable odd numbered single-precision registers.
    p5600                    - The P5600 Processor.
    ptr64                    - Pointers are 64-bit wide.
    single-float             - Only supports single precision float.
    soft-float               - Does not support floating point instructions.
    sym32                    - Symbols are 32 bit on Mips64.
...

And for mips64-unknown-linux-gnuabi64:

 $ rustc +nightly --print target-features -Z unstable-options --target mips64-unknown-linux-gnuabi64
Features supported by rustc for this target:
    fp64                     - Support 64-bit FP registers.
    msa                      - Mips MSA ASE.
    crt-static               - Enables C Run-time Libraries to be statically linked.

Code-generation features supported by LLVM for this target:
...
    mt                       - Mips MT ASE.
    nan2008                  - IEEE 754-2008 NaN encoding.
    noabicalls               - Disable SVR4-style position-independent code.
    nomadd4                  - Disable 4-operand madd.fmt and related instructions.
    nooddspreg               - Disable odd numbered single-precision registers.
    p5600                    - The P5600 Processor.
    ptr64                    - Pointers are 64-bit wide.
    single-float             - Only supports single precision float.
    soft-float               - Does not support floating point instructions.
...

It's great there's a new target that supports soft-float, but the targets are supposed to be soft-float but the actual targets assume they are hard-float.

[workingjubilee]

With respect, I believe you are misinterpreting the printed output there. The code generation features supported by LLVM you mention are called "target features" and they are optional. You may toggle them on or off for compilation, and they are not necessarily inherently part of the base target definition. Like all compiler directives, they are functionally similar to unsafe code in that you may get bogus results or even break compilation if you pass an incompatible set of such flags to code generation. This is part of why predefined targets which offer more convenient and more vetted combinations of features are made available.

Importantly: If you pass the correct flags to disable hardware floating point support (I am guessing -fp64 would be the right one), you must then enable +soft-float, or float code generation breaks in hopefully amusing but possibly just tragic ways. That is why you see soft-float as a feature there.

[Alexhuszagh]

Sorry I should have mentioned we used a RUSTFLAGS="-C target-feature=+soft-float" cargo +nightly build --target mips64-unknown-linux-muslabi64 --verbose -Zbuild-std build. and this still failed, however, it seems to be a toolchain error on our end. I tried building musl for a hard-float target, which works, but omitting the soft-float everything fails with a similar error. Sorry for the miscommunication.

[workingjubilee]

I would only expect -Ctarget-feature=+soft-float,-fp64 to work.

By merely enabling -Ctarget-feature=+soft-float, you are actually requesting both a hard float and a soft float target at once, which makes the float ABI ambiguous to LLVM. Providing better diagnostics about this is #89586