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LLVM-reserved registers can't be used in inline assembly #85056
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At this time, solutions other than “fixing LLVM” seem non-exhaustive or non-trivial. See additional discussion at https://rust-lang.zulipchat.com/#narrow/stream/216763-project-inline-asm/topic/Handling.20clobbers |
Un-reserving registers can be done backwards-compatibly, yes? Presumably this does not block stabilization of |
336: Avoiding use of LLVM reserved register `rbx` r=jethrogb a=raoulstrackx LLVM reserves register `rbx` in inline assembly (issue: #335). This PR avoids the use of this register until [rust-lang issue 85056](rust-lang/rust#85056) is merged Co-authored-by: Raoul Strackx <raoul.strackx@fortanix.com>
It seems that
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- correct seL4_Recv & co for MCS api difference - split MCS- vs !MCS-syscall wrappers into separate files - use split inout handling of src => badge NB: does not compile with MCS because the reply parameter is passed in r6 which is reserved on some arm targets; see rust-lang/rust#85056. Bug: 247129956 Change-Id: Idbade9bc50fd7a0968fcbc79a7df69251a473921 GitOrigin-RevId: fe4205dc462031a2910656c3edf2b6811331351d
In armv7 register r7 is used to hold the syscall number. However, r7 is also an LLVM reserved register ([1]) and cannot be used as an input register. As a temporary workaround we use r8 as temporary input register for holding the syscall number and then copy r8 into r7 before the actual system call. [1] rust-lang/rust#85056
- correct seL4_Recv & co for MCS api difference - split MCS- vs !MCS-syscall wrappers into separate files - use split inout handling of src => badge NB: does not compile with MCS because the reply parameter is passed in r6 which is reserved on some arm targets; see rust-lang/rust#85056. Bug: 247129956 Change-Id: Idbade9bc50fd7a0968fcbc79a7df69251a473921
Related: rust-lang/rust#85056 ISSUE: #31
On several architectures, some registers are considered reserved by LLVM. These registers effectively can't be used by LLVM's inline assembly instruction as in input/output/clobber.
rustc
currently disallows using these registers inasm!
. This seems to be in contradiction with a stated goal in the RFC:As such, I'd expect there to be no backend-specific limitations on inline assembly.
Current LLVM-reserved registers are:
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