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Enable RISC-V atomic compare and swap #57925

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merged 1 commit into from Jan 27, 2019

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fintelia commented Jan 26, 2019

Fixes #56564

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rust-highfive commented Jan 26, 2019

r? @cramertj

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memoryruins commented Jan 26, 2019

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nagisa commented Jan 26, 2019

From what I can see the LLVM submodule has not been updated in the past 6 weeks. It doesn’t seem like this should be landed before an LLVM update, but I would be fine with merging this if this PR updated the LLVM submodule as well...

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nikic commented Jan 26, 2019

@nagisa LLVM was updated in #57675. You probably still have the (now no longer used) pre-monorepo submodule lying around.

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nagisa commented Jan 26, 2019

@bors r+

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bors commented Jan 26, 2019

📌 Commit 607c543 has been approved by nagisa

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Centril commented Jan 27, 2019

r? @nagisa

You r+ it, you own it ;)

@rust-highfive rust-highfive assigned nagisa and unassigned cramertj Jan 27, 2019

Centril added a commit to Centril/rust that referenced this pull request Jan 27, 2019

Rollup merge of rust-lang#57925 - fintelia:riscv-cas, r=nagisa
Enable RISC-V atomic compare and swap

Fixes rust-lang#56564

bors added a commit that referenced this pull request Jan 27, 2019

Auto merge of #57930 - Centril:rollup, r=Centril
Rollup of 3 pull requests

Successful merges:

 - #57899 (Unused variable suggestions apply on all patterns.)
 - #57925 (Enable RISC-V atomic compare and swap)
 - #57927 (Remove lexical scope examples from std::mem::drop)

Failed merges:

r? @ghost
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bors commented Jan 27, 2019

⌛️ Testing commit 607c543 with merge 677064b...

bors added a commit that referenced this pull request Jan 27, 2019

Auto merge of #57925 - fintelia:riscv-cas, r=nagisa
Enable RISC-V atomic compare and swap

Fixes #56564
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bors commented Jan 27, 2019

☀️ Test successful - checks-travis, status-appveyor
Approved by: nagisa
Pushing 677064b to master...

@bors bors merged commit 607c543 into rust-lang:master Jan 27, 2019

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homu Test successful
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