SpinalHDL is an open source high-level hardware description language. It can be used as an alternative to VHDL or Verilog and has several advantages over them.
A number of expamples from the tutorial by Juan Gonzalez-Gomez (Obijuan)
Diseño Digital para FPGAs, con herramientas libres
(Digital Design for FPGAs, with free tools)
https://github.com/Obijuan/open-fpga-verilog-tutorial/wiki
rewritten from Verilog to SpinalHDL and tested with iCE40-HX8K Breakout Board - Lattice Semiconductor.
A collection of various SpinalHDL samples.
A few other (silly) experiments with iCE40-HX8K.
The Verilog programs generated by SpinalHDL can be built and uploaded to iCE40-HX8K by means of the tools, provided by https://github.com/FPGAwars.
In order for this stuff to be up and running, there has to be installed some additional software. The details can be found at