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[*] rtlgen generator was updated and fixed comma-separator at the end…
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… of comment lines. No functional changes
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sergeykhbr committed Nov 24, 2023
1 parent 9f2ea9a commit 3a3acbd
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Showing 7 changed files with 102 additions and 102 deletions.
4 changes: 2 additions & 2 deletions sc/prj/common/vips/uart/vip_uart_top.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -135,8 +135,8 @@ void vip_uart_top::generateVCD(sc_trace_file *i_vcd, sc_trace_file *o_vcd) {
}

std::string vip_uart_top::U8ToString(
std::string istr,
sc_uint<8> symb) {
std::string istr,
sc_uint<8> symb) {
char tstr[256];
std::string ostr;

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86 changes: 43 additions & 43 deletions sc/rtl/ambalib/types_amba.h
Original file line number Diff line number Diff line change
Expand Up @@ -73,9 +73,9 @@ class mapinfo_type {
}

public:
// Base Address.;
// Base Address.
uint64_t addr_start;
// Maskable bits of the base address.;
// Maskable bits of the base address.
uint64_t addr_end;
};

Expand Down Expand Up @@ -270,54 +270,54 @@ class axi4_metadata_type {

public:
sc_uint<CFG_SYSBUS_ADDR_BITS> addr;
// @brief Burst length.;
// @details This signal indicates the exact number of transfers in;
// a burst. This changes between AXI3 and AXI4. nastiXLenBits=8 so;
// this is an AXI4 implementation.;
// Burst_Length = len[7:0] + 1;
// @brief Burst length.
// @details This signal indicates the exact number of transfers in
// a burst. This changes between AXI3 and AXI4. nastiXLenBits=8 so
// this is an AXI4 implementation.
// Burst_Length = len[7:0] + 1
sc_uint<8> len;
// @brief Burst size.;
// @details This signal indicates the size of each transfer;
// in the burst: 0=1 byte; ..., 6=64 bytes; 7=128 bytes;;
// @brief Burst size.
// @details This signal indicates the size of each transfer
// in the burst: 0=1 byte; ..., 6=64 bytes; 7=128 bytes;
sc_uint<3> size;
// @brief Read response.;
// @details This signal indicates the status of the read transfer.;
// The responses are:;
// 0b00 FIXED - In a fixed burst, the address is the same for every transfer;
// in the burst. Typically is used for FIFO.;
// 0b01 INCR - Incrementing. In an incrementing burst, the address for each;
// transfer in the burst is an increment of the address for the;
// previous transfer. The increment value depends on the size of;
// the transfer.;
// 0b10 WRAP - A wrapping burst is similar to an incrementing burst, except;
// that the address wraps around to a lower address if an upper address;
// limit is reached.;
// 0b11 resrved.;
// @brief Read response.
// @details This signal indicates the status of the read transfer.
// The responses are:
// 0b00 FIXED - In a fixed burst, the address is the same for every transfer
// in the burst. Typically is used for FIFO.
// 0b01 INCR - Incrementing. In an incrementing burst, the address for each
// transfer in the burst is an increment of the address for the
// previous transfer. The increment value depends on the size of
// the transfer.
// 0b10 WRAP - A wrapping burst is similar to an incrementing burst, except
// that the address wraps around to a lower address if an upper address
// limit is reached.
// 0b11 resrved.
sc_uint<2> burst;
bool lock;
sc_uint<4> cache;
// @brief Protection type.;
// @details This signal indicates the privilege and security level;
// of the transaction, and whether the transaction is a data access;
// or an instruction access:;
// [0] : 0 = Unpriviledge access;
// 1 = Priviledge access;
// [1] : 0 = Secure access;
// 1 = Non-secure access;
// [2] : 0 = Data access;
// 1 = Instruction access;
// @brief Protection type.
// @details This signal indicates the privilege and security level
// of the transaction, and whether the transaction is a data access
// or an instruction access:
// [0] : 0 = Unpriviledge access
// 1 = Priviledge access
// [1] : 0 = Secure access
// 1 = Non-secure access
// [2] : 0 = Data access
// 1 = Instruction access
sc_uint<3> prot;
// @brief Quality of Service, QoS.;
// @details QoS identifier sent for each read transaction.;
// Implemented only in AXI4:;
// 0b0000 - default value. Indicates that the interface is;
// not participating in any QoS scheme.;
// @brief Quality of Service, QoS.
// @details QoS identifier sent for each read transaction.
// Implemented only in AXI4:
// 0b0000 - default value. Indicates that the interface is
// not participating in any QoS scheme.
sc_uint<4> qos;
// @brief Region identifier.;
// @details Permits a single physical interface on a slave to be used for;
// multiple logical interfaces. Implemented only in AXI4. This is;
// similar to the banks implementation in Leon3 without address;
// decoding.;
// @brief Region identifier.
// @details Permits a single physical interface on a slave to be used for
// multiple logical interfaces. Implemented only in AXI4. This is
// similar to the banks implementation in Leon3 without address
// decoding.
sc_uint<4> region;
};

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12 changes: 6 additions & 6 deletions sc/rtl/ambalib/types_pnp.h
Original file line number Diff line number Diff line change
Expand Up @@ -165,17 +165,17 @@ class dev_config_type {
}

public:
// Descriptor size in bytes.;
// Descriptor size in bytes.
sc_uint<8> descrsize;
// Descriptor type.;
// Descriptor type.
sc_uint<2> descrtype;
// Base Address.;
// Base Address.
sc_uint<64> addr_start;
// End of the base address.;
// End of the base address.
sc_uint<64> addr_end;
// Vendor ID.;
// Vendor ID.
sc_uint<16> vid;
// Device ID.;
// Device ID.
sc_uint<16> did;
};

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2 changes: 1 addition & 1 deletion sc/rtl/riverlib/types_river.h
Original file line number Diff line number Diff line change
Expand Up @@ -445,7 +445,7 @@ class axi4_l1_out_type {
sc_uint<CFG_CPU_ID_BITS> ar_id;
sc_uint<CFG_SYSBUS_USER_BITS> ar_user;
bool r_ready;
// ACE signals;
// ACE signals
sc_uint<2> ar_domain; // 00=Non-shareable (single master in domain)
sc_uint<4> ar_snoop; // Table C3-7:
sc_uint<2> ar_bar; // read barrier transaction
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86 changes: 43 additions & 43 deletions sv/rtl/ambalib/types_amba_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -26,9 +26,9 @@ localparam int CFG_SYSBUS_DATA_BITS = (8 * CFG_SYSBUS_DATA_BYTES);

// @brief Map information for the memory mapped device.
typedef struct {
// Base Address.;
// Base Address.
longint unsigned addr_start;
// Maskable bits of the base address.;
// Maskable bits of the base address.
longint unsigned addr_end;
} mapinfo_type;

Expand Down Expand Up @@ -116,54 +116,54 @@ localparam bit [3:0] AC_SNOOP_MAKE_INVALID = 4'hd;

typedef struct {
logic [CFG_SYSBUS_ADDR_BITS-1:0] addr;
// @brief Burst length.;
// @details This signal indicates the exact number of transfers in;
// a burst. This changes between AXI3 and AXI4. nastiXLenBits=8 so;
// this is an AXI4 implementation.;
// Burst_Length = len[7:0] + 1;
// @brief Burst length.
// @details This signal indicates the exact number of transfers in
// a burst. This changes between AXI3 and AXI4. nastiXLenBits=8 so
// this is an AXI4 implementation.
// Burst_Length = len[7:0] + 1
logic [7:0] len;
// @brief Burst size.;
// @details This signal indicates the size of each transfer;
// in the burst: 0=1 byte; ..., 6=64 bytes; 7=128 bytes;;
// @brief Burst size.
// @details This signal indicates the size of each transfer
// in the burst: 0=1 byte; ..., 6=64 bytes; 7=128 bytes;
logic [2:0] size;
// @brief Read response.;
// @details This signal indicates the status of the read transfer.;
// The responses are:;
// 0b00 FIXED - In a fixed burst, the address is the same for every transfer;
// in the burst. Typically is used for FIFO.;
// 0b01 INCR - Incrementing. In an incrementing burst, the address for each;
// transfer in the burst is an increment of the address for the;
// previous transfer. The increment value depends on the size of;
// the transfer.;
// 0b10 WRAP - A wrapping burst is similar to an incrementing burst, except;
// that the address wraps around to a lower address if an upper address;
// limit is reached.;
// 0b11 resrved.;
// @brief Read response.
// @details This signal indicates the status of the read transfer.
// The responses are:
// 0b00 FIXED - In a fixed burst, the address is the same for every transfer
// in the burst. Typically is used for FIFO.
// 0b01 INCR - Incrementing. In an incrementing burst, the address for each
// transfer in the burst is an increment of the address for the
// previous transfer. The increment value depends on the size of
// the transfer.
// 0b10 WRAP - A wrapping burst is similar to an incrementing burst, except
// that the address wraps around to a lower address if an upper address
// limit is reached.
// 0b11 resrved.
logic [1:0] burst;
logic lock;
logic [3:0] cache;
// @brief Protection type.;
// @details This signal indicates the privilege and security level;
// of the transaction, and whether the transaction is a data access;
// or an instruction access:;
// [0] : 0 = Unpriviledge access;
// 1 = Priviledge access;
// [1] : 0 = Secure access;
// 1 = Non-secure access;
// [2] : 0 = Data access;
// 1 = Instruction access;
// @brief Protection type.
// @details This signal indicates the privilege and security level
// of the transaction, and whether the transaction is a data access
// or an instruction access:
// [0] : 0 = Unpriviledge access
// 1 = Priviledge access
// [1] : 0 = Secure access
// 1 = Non-secure access
// [2] : 0 = Data access
// 1 = Instruction access
logic [2:0] prot;
// @brief Quality of Service, QoS.;
// @details QoS identifier sent for each read transaction.;
// Implemented only in AXI4:;
// 0b0000 - default value. Indicates that the interface is;
// not participating in any QoS scheme.;
// @brief Quality of Service, QoS.
// @details QoS identifier sent for each read transaction.
// Implemented only in AXI4:
// 0b0000 - default value. Indicates that the interface is
// not participating in any QoS scheme.
logic [3:0] qos;
// @brief Region identifier.;
// @details Permits a single physical interface on a slave to be used for;
// multiple logical interfaces. Implemented only in AXI4. This is;
// similar to the banks implementation in Leon3 without address;
// decoding.;
// @brief Region identifier.
// @details Permits a single physical interface on a slave to be used for
// multiple logical interfaces. Implemented only in AXI4. This is
// similar to the banks implementation in Leon3 without address
// decoding.
logic [3:0] region;
} axi4_metadata_type;

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12 changes: 6 additions & 6 deletions sv/rtl/ambalib/types_pnp_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -100,17 +100,17 @@ localparam int SOC_PNP_TOTAL = 16;
// @details Each device must generates this datatype output that
// is connected directly to the 'pnp' slave module on system bus.
typedef struct {
// Descriptor size in bytes.;
// Descriptor size in bytes.
logic [7:0] descrsize;
// Descriptor type.;
// Descriptor type.
logic [1:0] descrtype;
// Base Address.;
// Base Address.
logic [63:0] addr_start;
// End of the base address.;
// End of the base address.
logic [63:0] addr_end;
// Vendor ID.;
// Vendor ID.
logic [15:0] vid;
// Device ID.;
// Device ID.
logic [15:0] did;
} dev_config_type;

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2 changes: 1 addition & 1 deletion sv/rtl/riverlib/types_river_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -84,7 +84,7 @@ typedef struct {
logic [CFG_CPU_ID_BITS-1:0] ar_id;
logic [CFG_SYSBUS_USER_BITS-1:0] ar_user;
logic r_ready;
// ACE signals;
// ACE signals
logic [1:0] ar_domain; // 00=Non-shareable (single master in domain)
logic [3:0] ar_snoop; // Table C3-7:
logic [1:0] ar_bar; // read barrier transaction
Expand Down

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