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Modulo Scheduling:

• Make DDG for loop > Use current ddg code and pass instruction list for just the loop
• Add latency to DDG per instruction > Make the latency the value in the current 2D array
• Find anti-dependency loops > Recursive idea (Chris)
• Calculate ResMII and RecMII >
• Make new scheduler for modulo
• Cycle schedule everything but loops
• Prologue and Epilogue
• Rotate kernel so branch is at the end