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  • Usman Institute Of Technology

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siddiquimohsin/README.md

Hi 👋, I'm Muhammad Mohsin Siddiqui

siddiquimohsin

siddiquimohsin

  • I desiged Chisel and RISC-V Based Single Cycle Core

  • I designed Chisel and RISC-V Based Five Stage Pipeline Core

  • I worked on python basec Burq simulator to verify the Chisel and Verilog based cores

  • I worked on scala based projects using functional programming

  • I’m currently working to automate Berkeley Analog Generator using Reinforcement Learning and also Chisel based projects

  • How to reach me siddiquimohsin660@gmail.com

Connect with me:

mohsin siddiqui

Languages and Tools:

bootstrap c css3 django flask flutter git html5 linux mysql oracle python qt

siddiquimohsin

 siddiquimohsin

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