Cell configs for imx8mq EVK board.

Signed-off-by: Peng Fang <peng.fan@nxp.com>
Signed-off-by: Claudio Scordino <claudio@evidence.eu.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

configs/arm64/imx8mq-gic-demo.c

@@ -0,0 +1,56 @@
+/*
+ * iMX8MQ target - gic-demo
+ *
+ * Copyright NXP 2018
+ *
+ * Authors:
+ *  Peng Fan <peng.fan@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) sizeof(a) / sizeof(a[0])
+
+struct {
+	struct jailhouse_cell_desc cell;
+	__u64 cpus[1];
+	struct jailhouse_memory mem_regions[2];
+} __attribute__((packed)) config = {
+	.cell = {
+		.signature = JAILHOUSE_CELL_DESC_SIGNATURE,
+		.revision = JAILHOUSE_CONFIG_REVISION,
+		.name = "gic-demo",
+		.flags = JAILHOUSE_CELL_PASSIVE_COMMREG,
+
+		.cpu_set_size = sizeof(config.cpus),
+		.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+		.num_irqchips = 0,
+		.pio_bitmap_size = 0,
+		.num_pci_devices = 0,
+	},
+
+	.cpus = {
+		0x8,
+	},
+
+	.mem_regions = {
+		/* UART1 */ {
+			.phys_start = 0x30860000,
+			.virt_start = 0x30860000,
+			.size = 0x1000,
+			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+				JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
+		},
+		/* RAM: Top at 4GB Space */ {
+			.phys_start = 0xffaf0000,
+			.virt_start = 0,
+			.size = 0x00010000,
+			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+				JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
+		},
+	}
+};

configs/arm64/imx8mq.c

@@ -0,0 +1,108 @@
+/*
+ * i.MX8MQ Target
+ *
+ * Copyright 2017 NXP
+ *
+ * Authors:
+ *  Peng Fan <peng.fan@nxp.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ *
+ * Reservation via device tree: reg = <0x0 0xffaf0000 0x0 0x510000>
+ */
+
+#include <jailhouse/types.h>
+#include <jailhouse/cell-config.h>
+
+#define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0]))
+
+struct {
+	struct jailhouse_system header;
+	__u64 cpus[1];
+	struct jailhouse_memory mem_regions[4];
+	struct jailhouse_irqchip irqchips[3];
+} __attribute__((packed)) config = {
+	.header = {
+		.signature = JAILHOUSE_SYSTEM_SIGNATURE,
+		.revision = JAILHOUSE_CONFIG_REVISION,
+		.hypervisor_memory = {
+			.phys_start = 0xffc00000,
+			.size =       0x00400000,
+		},
+		.debug_console = {
+			.address = 0x30860000,
+			.size = 0x1000,
+			.flags = JAILHOUSE_CON1_TYPE_IMX |
+				 JAILHOUSE_CON1_ACCESS_MMIO |
+				 JAILHOUSE_CON1_REGDIST_4 |
+				 JAILHOUSE_CON2_TYPE_ROOTPAGE,
+		},
+		.platform_info = {
+			.arm = {
+				.gic_version = 3,
+				.gicd_base = 0x38800000,
+				.gicr_base = 0x38880000,
+				.maintenance_irq = 25,
+			},
+		},
+		.root_cell = {
+			.name = "imx8mq",
+
+			.cpu_set_size = sizeof(config.cpus),
+			.num_memory_regions = ARRAY_SIZE(config.mem_regions),
+			.num_irqchips = ARRAY_SIZE(config.irqchips),
+		},
+	},
+
+	.cpus = {
+		0xf,
+	},
+
+	.mem_regions = {
+		/* MMIO (permissive) */ {
+			.phys_start = 0x00000000,
+			.virt_start = 0x00000000,
+			.size =	      0x40000000,
+			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+				JAILHOUSE_MEM_IO,
+		},
+		/* RAM */ {
+			.phys_start = 0x40000000,
+			.virt_start = 0x40000000,
+			.size = 0xbfb00000,
+			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
+				JAILHOUSE_MEM_EXECUTE,
+		},
+		/* IVSHMEM shared memory region for 00:00.0 */ {
+			.phys_start = 0xffb00000,
+			.virt_start = 0xffb00000,
+			.size = 0x100000,
+			.flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
+		},
+	},
+
+	.irqchips = {
+		/* GIC */ {
+			.address = 0x38800000,
+			.pin_base = 32,
+			.pin_bitmap = {
+				0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+			},
+		},
+		/* GIC */ {
+			.address = 0x38800000,
+			.pin_base = 160,
+			.pin_bitmap = {
+				0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+			},
+		},
+		/* GIC */ {
+			.address = 0x38800000,
+			.pin_base = 288,
+			.pin_bitmap = {
+				0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
+			},
+		},
+	},
+};

inmates/lib/arm64/include/mach.h

@@ -94,6 +94,18 @@
 #define GICD_V3_BASE	((void *)0x08000000)
 #define GICR_V3_BASE	((void *)0x08100000)	/* CPU 3 */
 
+#elif defined(CONFIG_MACH_IMX8MQ)
+#define CON_TYPE	"IMX-UART"
+#define CON_BASE	0x30860000
+
+#define GIC_VERSION	3
+#define GICD_V3_BASE	((void *)0x38800000)
+/*
+ * Note: The GICR_V3_BASE address is core-specific.
+ * Address is 0x38880000 + x * 2 * 64K
+ */
+#define GICR_V3_BASE	((void *)0x388e0000)	/* CPU 3 */
+
 #endif
 
 #ifndef TIMER_IRQ