core: ivshmem: Remove "pci" tagging from function and module names

The ivshmem device is PCI-only, and it seems it will remain like that,
even when expanding to targets without physical PCI support. Therefore,
it adds no value to have "pci_" in its names all over the place because
the will be no PCI-free variant in parallel.

Besides the renaming, this also consolidates pci_ivshmem_update_msix and
ivshmem_update_msix into a single service.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

hypervisor/arch/x86/Makefile

@@ -15,7 +15,7 @@
 BUILT_IN_OBJECTS := built-in-amd.o built-in-intel.o
 COMMON_OBJECTS := apic.o dbg-write.o entry.o setup.o control.o mmio.o iommu.o \
 		  paging.o ../../pci.o pci.o ioapic.o i8042.o vcpu.o \
-		  ../../pci_ivshmem.o
+		  ../../ivshmem.o
 
 always := $(BUILT_IN_OBJECTS)
 

hypervisor/arch/x86/vtd.c

@@ -394,7 +394,7 @@ static int vtd_emulate_inv_int(unsigned int unit_no, unsigned int index)
 
 	device = pci_get_assigned_device(&root_cell, irte_usage->device_id);
 	if (device && device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM)
-		return pci_ivshmem_update_msix(device);
+		return ivshmem_update_msix(device);
 
 	irq_msg = iommu_get_remapped_root_int(unit_no, irte_usage->device_id,
 					      irte_usage->vector, index);

hypervisor/include/jailhouse/ivshmem.h

@@ -21,27 +21,27 @@
 #define IVSHMEM_CFG_SIZE	(IVSHMEM_CFG_MSIX_CAP + 12)
 
 /**
- * @defgroup PCI-IVSHMEM ivshmem
+ * @defgroup IVSHMEM ivshmem
  * @{
  */
 
-struct pci_ivshmem_endpoint {
+struct ivshmem_endpoint {
 	u32 cspace[IVSHMEM_CFG_SIZE / sizeof(u32)];
 	u32 ivpos;
 	u64 bar0_address;
 	u64 bar4_address;
 	struct pci_device *device;
-	struct pci_ivshmem_endpoint *remote;
+	struct ivshmem_endpoint *remote;
 	struct apic_irq_message irq_msg;
 };
 
-int pci_ivshmem_init(struct cell *cell, struct pci_device *device);
-void pci_ivshmem_exit(struct pci_device *device);
-int pci_ivshmem_update_msix(struct pci_device *device);
-enum pci_access pci_ivshmem_cfg_write(struct pci_device *device,
+int ivshmem_init(struct cell *cell, struct pci_device *device);
+void ivshmem_exit(struct pci_device *device);
+int ivshmem_update_msix(struct pci_device *device);
+enum pci_access ivshmem_pci_cfg_write(struct pci_device *device,
 				      unsigned int row, u32 mask, u32 value);
-enum pci_access pci_ivshmem_cfg_read(struct pci_device *device, u16 address,
+enum pci_access ivshmem_pci_cfg_read(struct pci_device *device, u16 address,
 				     u32 *value);
 
-/** @} PCI-IVSHMEM */
+/** @} IVSHMEM */
 #endif /* !_JAILHOUSE_IVSHMEM_H */

hypervisor/include/jailhouse/pci.h

@@ -41,6 +41,7 @@
 #define PCI_IVSHMEM_NUM_MMIO_REGIONS	2
 
 struct cell;
+struct ivshmem_endpoint;
 
 /**
  * @defgroup PCI PCI Subsystem
@@ -135,7 +136,7 @@ struct pci_device {
 	/** Shadow state of MSI-X config space registers. */
 	union pci_msix_registers msix_registers;
 	/** ivshmem specific data. */
-	struct pci_ivshmem_endpoint *ivshmem_endpoint;
+	struct ivshmem_endpoint *ivshmem_endpoint;
 	/** Real MSI-X table. */
 	union pci_msix_vector *msix_table;
 	/** Shadow state of MSI-X table. */

hypervisor/pci_ivshmem.c → hypervisor/ivshmem.c

@@ -10,7 +10,7 @@
  * the COPYING file in the top-level directory.
  */
 
-/** @addtogroup PCI-IVSHMEM
+/** @addtogroup IVSHMEM
  * Inter Cell communication using a virtual PCI device. The device provides
  * shared memory and interrupts based on MSI-X.
  *
@@ -44,12 +44,12 @@
 #define IVSHMEM_BAR0_SIZE	256
 #define IVSHMEM_BAR4_SIZE	((0x18 * IVSHMEM_MSIX_VECTORS + 0xf) & ~0xf)
 
-struct pci_ivshmem_data {
-	struct pci_ivshmem_endpoint eps[2];
-	struct pci_ivshmem_data *next;
+struct ivshmem_data {
+	struct ivshmem_endpoint eps[2];
+	struct ivshmem_data *next;
 };
 
-static struct pci_ivshmem_data *ivshmem_list;
+static struct ivshmem_data *ivshmem_list;
 
 static const u32 default_cspace[IVSHMEM_CFG_SIZE / sizeof(u32)] = {
 	[0x00/4] = (IVSHMEM_DEVICE_ID << 16) | VIRTIO_VENDOR_ID,
@@ -65,9 +65,9 @@ static const u32 default_cspace[IVSHMEM_CFG_SIZE / sizeof(u32)] = {
 					   (PCI_CFG_BAR/8 + 2),
 };
 
-static void ivshmem_write_doorbell(struct pci_ivshmem_endpoint *ive)
+static void ivshmem_write_doorbell(struct ivshmem_endpoint *ive)
 {
-	struct pci_ivshmem_endpoint *remote = ive->remote;
+	struct ivshmem_endpoint *remote = ive->remote;
 	struct apic_irq_message irq_msg;
 
 	if (!remote)
@@ -84,7 +84,7 @@ static void ivshmem_write_doorbell(struct pci_ivshmem_endpoint *ive)
 static enum mmio_result ivshmem_register_mmio(void *arg,
 					      struct mmio_access *mmio)
 {
-	struct pci_ivshmem_endpoint *ive = arg;
+	struct ivshmem_endpoint *ive = arg;
 
 	/* read-only IVPosition */
 	if (mmio->address == IVSHMEM_REG_IVPOS && !mmio->is_write) {
@@ -104,7 +104,7 @@ static enum mmio_result ivshmem_register_mmio(void *arg,
 	return MMIO_ERROR;
 }
 
-static bool ivshmem_is_msix_masked(struct pci_ivshmem_endpoint *ive)
+static bool ivshmem_is_msix_masked(struct ivshmem_endpoint *ive)
 {
 	union pci_msix_registers c;
 
@@ -124,11 +124,18 @@ static bool ivshmem_is_msix_masked(struct pci_ivshmem_endpoint *ive)
 	return false;
 }
 
-static int ivshmem_update_msix(struct pci_ivshmem_endpoint *ive)
+/**
+ * Update cached MSI-X state of the given ivshmem device.
+ * @param device	The device to be updated.
+ *
+ * @return 0 on success, negative error code otherwise.
+ */
+int ivshmem_update_msix(struct pci_device *device)
 {
+	struct ivshmem_endpoint *ive = device->ivshmem_endpoint;
 	union x86_msi_vector msi = {
-		.raw.address = ive->device->msix_vectors[0].address,
-		.raw.data = ive->device->msix_vectors[0].data,
+		.raw.address = device->msix_vectors[0].address,
+		.raw.data = device->msix_vectors[0].data,
 	};
 	struct apic_irq_message irq_msg;
 
@@ -140,15 +147,15 @@ static int ivshmem_update_msix(struct pci_ivshmem_endpoint *ive)
 	if (ivshmem_is_msix_masked(ive))
 		return 0;
 
-	irq_msg = pci_translate_msi_vector(ive->device, 0, 0, msi);
+	irq_msg = pci_translate_msi_vector(device, 0, 0, msi);
 	if (!irq_msg.valid)
 		return 0;
 
 	if (!apic_filter_irq_dest(ive->device->cell, &irq_msg)) {
 		panic_printk("FATAL: ivshmem MSI-X target outside of "
 			     "cell \"%s\" device %02x:%02x.%x\n",
-			     ive->device->cell->config->name,
-			     PCI_BDF_PARAMS(ive->device->info->bdf));
+			     device->cell->config->name,
+			     PCI_BDF_PARAMS(device->info->bdf));
 		return -EPERM;
 	}
 	/* now copy the whole struct into our cache and mark the cache
@@ -163,7 +170,7 @@ static int ivshmem_update_msix(struct pci_ivshmem_endpoint *ive)
 
 static enum mmio_result ivshmem_msix_mmio(void *arg, struct mmio_access *mmio)
 {
-	struct pci_ivshmem_endpoint *ive = arg;
+	struct ivshmem_endpoint *ive = arg;
 	u32 *msix_table = (u32 *)ive->device->msix_vectors;
 
 	if (mmio->address % 4)
@@ -181,7 +188,7 @@ static enum mmio_result ivshmem_msix_mmio(void *arg, struct mmio_access *mmio)
 	} else {
 		if (mmio->is_write) {
 			msix_table[mmio->address / 4] = mmio->value;
-			if (ivshmem_update_msix(ive))
+			if (ivshmem_update_msix(ive->device))
 				return MMIO_ERROR;
 		} else {
 			mmio->value = msix_table[mmio->address / 4];
@@ -199,15 +206,15 @@ static enum mmio_result ivshmem_msix_mmio(void *arg, struct mmio_access *mmio)
  * update the command register
  * note that we only accept writes to two flags
  */
-static int ivshmem_write_command(struct pci_ivshmem_endpoint *ive, u16 val)
+static int ivshmem_write_command(struct ivshmem_endpoint *ive, u16 val)
 {
 	u16 *cmd = (u16 *)&ive->cspace[PCI_CFG_COMMAND/4];
 	struct pci_device *device = ive->device;
 	int err;
 
 	if ((val & PCI_CMD_MASTER) != (*cmd & PCI_CMD_MASTER)) {
 		*cmd = (*cmd & ~PCI_CMD_MASTER) | (val & PCI_CMD_MASTER);
-		err = ivshmem_update_msix(ive);
+		err = ivshmem_update_msix(device);
 		if (err)
 			return err;
 	}
@@ -234,7 +241,7 @@ static int ivshmem_write_command(struct pci_ivshmem_endpoint *ive, u16 val)
 	return 0;
 }
 
-static int ivshmem_write_msix_control(struct pci_ivshmem_endpoint *ive, u32 val)
+static int ivshmem_write_msix_control(struct ivshmem_endpoint *ive, u32 val)
 {
 	union pci_msix_registers *p = (union pci_msix_registers *)&val;
 	union pci_msix_registers newval = {
@@ -245,15 +252,14 @@ static int ivshmem_write_msix_control(struct pci_ivshmem_endpoint *ive, u32 val)
 	newval.fmask = p->fmask;
 	if (ive->cspace[IVSHMEM_CFG_MSIX_CAP/4] != newval.raw) {
 		ive->cspace[IVSHMEM_CFG_MSIX_CAP/4] = newval.raw;
-		return ivshmem_update_msix(ive);
+		return ivshmem_update_msix(ive->device);
 	}
 	return 0;
 }
 
-static struct pci_ivshmem_data **ivshmem_find(struct pci_device *d,
-					      int *cellnum)
+static struct ivshmem_data **ivshmem_find(struct pci_device *d, int *cellnum)
 {
-	struct pci_ivshmem_data **ivp, *iv;
+	struct ivshmem_data **ivp, *iv;
 	u16 bdf2;
 
 	for (ivp = &ivshmem_list; *ivp; ivp = &((*ivp)->next)) {
@@ -278,13 +284,13 @@ static struct pci_ivshmem_data **ivshmem_find(struct pci_device *d,
 	return NULL;
 }
 
-static void ivshmem_connect_cell(struct pci_ivshmem_data *iv,
+static void ivshmem_connect_cell(struct ivshmem_data *iv,
 				 struct pci_device *d,
 				 const struct jailhouse_memory *mem,
 				 int cellnum)
 {
-	struct pci_ivshmem_endpoint *remote = &iv->eps[(cellnum + 1) % 2];
-	struct pci_ivshmem_endpoint *ive = &iv->eps[cellnum];
+	struct ivshmem_endpoint *remote = &iv->eps[(cellnum + 1) % 2];
+	struct ivshmem_endpoint *ive = &iv->eps[cellnum];
 
 	d->bar[0] = PCI_BAR_64BIT;
 	d->bar[4] = PCI_BAR_64BIT;
@@ -309,10 +315,10 @@ static void ivshmem_connect_cell(struct pci_ivshmem_data *iv,
 	d->ivshmem_endpoint = ive;
 }
 
-static void ivshmem_disconnect_cell(struct pci_ivshmem_data *iv, int cellnum)
+static void ivshmem_disconnect_cell(struct ivshmem_data *iv, int cellnum)
 {
-	struct pci_ivshmem_endpoint *remote = &iv->eps[(cellnum + 1) % 2];
-	struct pci_ivshmem_endpoint *ive = &iv->eps[cellnum];
+	struct ivshmem_endpoint *remote = &iv->eps[(cellnum + 1) % 2];
+	struct ivshmem_endpoint *ive = &iv->eps[cellnum];
 	u16 cmd = *(u16 *)&ive->cspace[PCI_CFG_COMMAND / 4];
 
 	if (cmd & PCI_CMD_MEM) {
@@ -336,10 +342,10 @@ static void ivshmem_disconnect_cell(struct pci_ivshmem_data *iv, int cellnum)
  *
  * @see pci_cfg_write_moderate
  */
-enum pci_access pci_ivshmem_cfg_write(struct pci_device *device,
+enum pci_access ivshmem_pci_cfg_write(struct pci_device *device,
 				      unsigned int row, u32 mask, u32 value)
 {
-	struct pci_ivshmem_endpoint *ive = device->ivshmem_endpoint;
+	struct ivshmem_endpoint *ive = device->ivshmem_endpoint;
 
 	if (row >= ARRAY_SIZE(default_cspace))
 		return PCI_ACCESS_REJECT;
@@ -368,10 +374,10 @@ enum pci_access pci_ivshmem_cfg_write(struct pci_device *device,
  *
  * @see pci_cfg_read_moderate
  */
-enum pci_access pci_ivshmem_cfg_read(struct pci_device *device, u16 address,
+enum pci_access ivshmem_pci_cfg_read(struct pci_device *device, u16 address,
 				     u32 *value)
 {
-	struct pci_ivshmem_endpoint *ive = device->ivshmem_endpoint;
+	struct ivshmem_endpoint *ive = device->ivshmem_endpoint;
 
 	if (address < sizeof(default_cspace))
 		*value = ive->cspace[address / 4] >> ((address % 4) * 8);
@@ -380,28 +386,17 @@ enum pci_access pci_ivshmem_cfg_read(struct pci_device *device, u16 address,
 	return PCI_ACCESS_DONE;
 }
 
-/**
- * Update cached MSI-X state of the given ivshmem device.
- * @param device	The device to be updated.
- *
- * @return 0 on success, negative error code otherwise.
- */
-int pci_ivshmem_update_msix(struct pci_device *device)
-{
-	return ivshmem_update_msix(device->ivshmem_endpoint);
-}
-
 /**
  * Register a new ivshmem device.
  * @param cell		The cell the device should be attached to.
  * @param device	The device to be registered.
  *
  * @return 0 on success, negative error code otherwise.
  */
-int pci_ivshmem_init(struct cell *cell, struct pci_device *device)
+int ivshmem_init(struct cell *cell, struct pci_device *device)
 {
 	const struct jailhouse_memory *mem, *mem0;
-	struct pci_ivshmem_data **ivp;
+	struct ivshmem_data **ivp;
 	struct pci_device *dev0;
 
 	if (device->info->num_msix_vectors != 1)
@@ -451,9 +446,9 @@ int pci_ivshmem_init(struct cell *cell, struct pci_device *device)
  * @param device	The device to be stopped.
  *
  */
-void pci_ivshmem_exit(struct pci_device *device)
+void ivshmem_exit(struct pci_device *device)
 {
-	struct pci_ivshmem_data **ivp, *iv;
+	struct ivshmem_data **ivp, *iv;
 	int cellnum;
 
 	ivp = ivshmem_find(device, &cellnum);

hypervisor/pci.c

@@ -226,7 +226,7 @@ enum pci_access pci_cfg_read_moderate(struct pci_device *device, u16 address,
 	}
 
 	if (device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM)
-		return pci_ivshmem_cfg_read(device, address, value);
+		return ivshmem_pci_cfg_read(device, address, value);
 
 	if (address < PCI_CONFIG_HEADER_SIZE)
 		return PCI_ACCESS_PERFORM;
@@ -309,7 +309,7 @@ enum pci_access pci_cfg_write_moderate(struct pci_device *device, u16 address,
 		switch (cfg_control.type) {
 		case PCI_CONFIG_ALLOW:
 			if (device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM)
-				return pci_ivshmem_cfg_write(device,
+				return ivshmem_pci_cfg_write(device,
 						address / 4, mask, value);
 			return PCI_ACCESS_PERFORM;
 		case PCI_CONFIG_RDONLY:
@@ -320,7 +320,7 @@ enum pci_access pci_cfg_write_moderate(struct pci_device *device, u16 address,
 	}
 
 	if (device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM)
-		return pci_ivshmem_cfg_write(device, address / 4, mask, value);
+		return ivshmem_pci_cfg_write(device, address / 4, mask, value);
 
 	cap = pci_find_capability(device, address);
 	if (!cap || !(cap->flags & JAILHOUSE_PCICAPS_WRITE))
@@ -681,7 +681,7 @@ int pci_cell_init(struct cell *cell)
 		device->msix_vectors = device->msix_vector_array;
 
 		if (device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM) {
-			err = pci_ivshmem_init(cell, device);
+			err = ivshmem_init(cell, device);
 			if (err)
 				goto error;
 
@@ -758,7 +758,7 @@ void pci_cell_exit(struct cell *cell)
 	for_each_configured_pci_device(device, cell)
 		if (device->cell) {
 			if (device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM) {
-				pci_ivshmem_exit(device);
+				ivshmem_exit(device);
 			} else {
 				pci_remove_physical_device(device);
 				pci_return_device_to_root_cell(device);
@@ -798,7 +798,7 @@ void pci_config_commit(struct cell *cell_added_removed)
 					goto error;
 			}
 			if (device->info->type == JAILHOUSE_PCI_TYPE_IVSHMEM) {
-				err = pci_ivshmem_update_msix(device);
+				err = ivshmem_update_msix(device);
 				if (err) {
 					cap = NULL;
 					goto error;