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arm, arm64: Emulate PSCI service PSCI_CPU_SUSPEND
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This is a mandatory service with PSCI v0.2+, and if the root cell was
using it prior to enabling Jailhouse, just returning an error, like we
do so far, will send the CPUs into a busy loop.

Implement the minimum of this service by sending the CPU into a wfi, but
only if there are no interrupt waiting to be injected. We better check
for physical interrupts after the wfi to reduce world switches and,
thus, event delivery latencies.

CC: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
CC: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
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jan-kiszka committed Dec 5, 2016
1 parent 2207caf commit e3c57d5
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Showing 2 changed files with 10 additions and 0 deletions.
2 changes: 2 additions & 0 deletions hypervisor/arch/arm-common/include/asm/psci.h
Expand Up @@ -14,6 +14,8 @@
#define _JAILHOUSE_ASM_PSCI_H

#define PSCI_VERSION 0x84000000
#define PSCI_CPU_SUSPEND_32 0x84000001
#define PSCI_CPU_SUSPEND_64 0xc4000001
#define PSCI_CPU_OFF 0x84000002
#define PSCI_CPU_ON_32 0x84000003
#define PSCI_CPU_ON_64 0xc4000003
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8 changes: 8 additions & 0 deletions hypervisor/arch/arm-common/psci.c
Expand Up @@ -79,6 +79,14 @@ long psci_dispatch(struct trap_context *ctx)
/* Major[31:16], minor[15:0] */
return 2;

case PSCI_CPU_SUSPEND_32:
case PSCI_CPU_SUSPEND_64:
if (!irqchip_has_pending_irqs()) {
asm volatile("wfi" : : : "memory");
irqchip_handle_irq(cpu_data);
}
return 0;

case PSCI_CPU_OFF:
case PSCI_CPU_OFF_V0_1_UBOOT:
arm_cpu_park();
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