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Releases: slaclab/axi-pcie-core

Minor Release v3.4.0

11 Sep 22:26
@ruck314 ruck314
v3.4.0
e5c757f
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Minor Release v3.4.0

Pull Requests Since v3.3.0

Enhancement

  1. #64 - Adding BittWare XUP-VV8 support

Unlabeled

  1. #65 - Release Candidate v3.4.0
  2. #63 - updating Xilinx Alveo DDR from 4 to 8 bit ID width
  3. #62 - adding DMA size checking

Pull Request Details

adding DMA size checking
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Sat Jul 18 22:57:45 2020 -0700
Pull: #62 (17 additions, 3 deletions, 1 files changed)
Branch: slaclab/ESROGUE-318
Jira: https://jira.slac.stanford.edu/issues/ESROGUE-318

Notes:

updating Xilinx Alveo DDR from 4 to 8 bit ID width
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Mon Aug 10 12:57:00 2020 -0700
Pull: #63 (170 additions, 151 deletions, 24 files changed)
Branch: slaclab/DDR-AXI-ID

Notes:

Adding BittWare XUP-VV8 support
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Sep 10 19:42:56 2020 -0700
Pull: #64 (11562 additions, 872 deletions, 37 files changed)
Branch: slaclab/xup-vv8
Labels: enhancement

Notes:

Release Candidate v3.4.0
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Fri Sep 11 15:23:26 2020 -0700
Pull: #65 (19694 additions, 3333 deletions, 149 files changed)
Branch: slaclab/pre-release
Issues: #62, #63, #64

Notes:

Description

  • adding DMA size checking #62
  • updating Xilinx Alveo DDR from 4 to 8 bit ID width #63
  • Adding BittWare XUP-VV8 support #64
Assets 2
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Minor Release

10 Jul 23:52
@ruck314 ruck314
v3.3.0
c50c2db
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Minor Release

Pull Requests Since v3.2.1

Unlabeled

  1. #61 - Release Candidate v3.3.0
  2. #60 - Allow per destination buffer limits in DMA engine

Pull Request Details

Allow per destination buffer limits in DMA engine
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jul 9 15:34:06 2020 -0700
Pull: #60 (427 additions, 395 deletions, 19 files changed)
Branch: slaclab/dest_buffer_limits

Notes:

The goal of this PR is to allow a limit on the number of outstanding DMA buffers any single destination can be using. This will allow the client to set a max buffer count after opening a channel on the driver. The end result is a flow control signal which extends outside of the dma engine to the mux point for a set of streams.

In order to accomplish this we need to communicate this per dest pause to the mux stage. Here I propose adding a destPause vector to the AxiStreamCtrl record and using this record in the AxiStreamMux device.

Release Candidate v3.3.0
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jul 9 15:36:07 2020 -0700
Pull: #61 (1262 additions, 1410 deletions, 108 files changed)
Branch: slaclab/pre-release
Issues: #60

Notes:

Description

  • Allow per destination buffer limits in DMA engine #60
Assets 2
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Patch Release

10 Jul 23:51
@ruck314 ruck314
v3.2.1
e3ac1c3
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Patch Release

Pull Requests Since v3.2.1

Unlabeled

  1. #61 - Release Candidate v3.3.0
  2. #60 - Allow per destination buffer limits in DMA engine

Pull Request Details

Allow per destination buffer limits in DMA engine
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jul 9 15:34:06 2020 -0700
Pull: #60 (427 additions, 395 deletions, 19 files changed)
Branch: slaclab/dest_buffer_limits

Notes:

The goal of this PR is to allow a limit on the number of outstanding DMA buffers any single destination can be using. This will allow the client to set a max buffer count after opening a channel on the driver. The end result is a flow control signal which extends outside of the dma engine to the mux point for a set of streams.

In order to accomplish this we need to communicate this per dest pause to the mux stage. Here I propose adding a destPause vector to the AxiStreamCtrl record and using this record in the AxiStreamMux device.

Release Candidate v3.3.0
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jul 9 15:36:07 2020 -0700
Pull: #61 (1262 additions, 1410 deletions, 108 files changed)
Branch: slaclab/pre-release
Issues: #60

Notes:

Description

  • Allow per destination buffer limits in DMA engine #60
Assets 2
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Minor Release

24 Mar 22:31
@ruck314 ruck314
v3.2.0
ef297a5
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Minor Release

Pull Requests

  1. #57 - adding flake8 to .travis.yml

Pull Request Details

adding flake8 to .travis.yml
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Feb 20 14:19:02 2020 -0800
Pull: #57 (218 additions, 176 deletions, 10 files changed)
Branch: slaclab/flake8

Notes:

Description

  • Added python linter to travic CI
  • Fixed some bugs in the python code
    • Caught by the linter
  • Some mics code header clean up
Assets 2
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Patch Release

28 Feb 18:41
@ruck314 ruck314
v3.1.3
6332a08
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Patch Release

Description

  • Rename tox.ini to .flake8
Assets 2
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Patch Release

12 Feb 23:47
@ruck314 ruck314
v3.1.2
0357fec
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Patch Release

Pull Requests

  1. #56 - v3.1.2 release candidate
  2. #55 - Add anaconda recipe

Pull Request Details

v3.1.2 release candidate
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Wed Feb 12 15:46:36 2020 -0800
Pull: #56 (256 additions, 42 deletions, 18 files changed)
Branch: slaclab/pre-release

Notes:

Description

  • Add anaconda recipe #55
  • bug fix for 7-series FPGA and User General Purpose AXI Interface
  • XilinxKcu105App.xdc update
  • Updating submodule checks

Add anaconda recipe
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Wed Feb 12 08:25:52 2020 -0800
Pull: #55 (153 additions, 3 deletions, 6 files changed)
Branch: slaclab/conda_package

Notes:

Assets 2
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Patch Release

24 Jan 00:03
@ruck314 ruck314
v3.1.1
d350861
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Patch Release

Pull Requests

  1. #53 - v3.1.1 release candidate
  2. #51 - Rogue updates
  3. #52 - Move update script
  4. #50 - TKEEP_MODE_C = TKEEP_COUNT_C,

Pull Request Details

v3.1.1 release candidate
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jan 23 15:37:00 2020 -0800
Pull: #53 (447 additions, 365 deletions, 9 files changed)
Branch: slaclab/pre-release

Notes:

Description

  • Rogue updates #51
  • TKEEP_MODE_C = TKEEP_COUNT_C, #50
  • Move update script #52

Rogue updates
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jan 16 20:57:44 2020 -0800
Pull: #51 (328 additions, 294 deletions, 6 files changed)
Branch: slaclab/rogue-update

Notes:

Description

  • Split PcieAxiVersion class into its own file
  • Add utility class for creating rogue stream and memory interfaces
  • Rewrite class into two separate functions
  • Add generic root class for an AXI-PCIE card

Move update script
Author: Ryan Herbst rherbst@slac.stanford.edu
Date: Tue Jan 21 09:10:05 2020 -0800
Pull: #52 (91 additions, 43 deletions, 1 files changed)
Branch: slaclab/move_update

Notes:

This moves the updatePcieFpga.py script into the axiPcie package. This will help avoid name conflicts and will allow the update script to be executed with the following command after it is installed in a release:

python -m axiPcie.updateFpga

TKEEP_MODE_C = TKEEP_COUNT_C,
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jan 16 20:58:28 2020 -0800
Pull: #50 (1 additions, 1 deletions, 1 files changed)
Branch: slaclab/AxiPcieGpuAsyncCore-update

Notes:

AXI DMA V2 uses TKEEP_COUNT_C to help meet timing

Assets 2
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Minor Release

16 Jan 17:02
@ruck314 ruck314
v3.1.0
f98004f
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Minor Release
  1. #49 - v3.1.0 release candidate
  2. #48 - Support for a direct async dma to/from a NVIDIA GPU
  3. #47 - adding general purpose user AXI interface
  4. #46 - adding hardware/SlacPgpCardG4

Pull Request Details

v3.1.0 release candidate
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Jan 16 08:58:05 2020 -0800
Pull: #49 (51220 additions, 2545 deletions, 116 files changed)
Branch: slaclab/pre-release

Notes:

Description

  • adding hardware/SlacPgpCardG4 #46
  • adding general purpose user AXI interface #47
  • Support for a direct async dma to/from a NVIDIA GPU #48

Support for a direct async dma to/from a NVIDIA GPU
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Wed Jan 15 17:02:02 2020 -0800
Pull: #48 (49462 additions, 2513 deletions, 81 files changed)
Branch: slaclab/gpu_async_new

Notes:

Includes commits from #47

adding general purpose user AXI interface
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Wed Jan 15 16:13:41 2020 -0800
Pull: #47 (48637 additions, 2513 deletions, 76 files changed)
Branch: slaclab/user-maxi

Notes:

Description

  • adding general purpose user AXI interface to shared/rtl/AxiPcieCrossbar.vhd
  • adding general purpose user AXI interface to hardware/XilinxKcu1500
  • logic optimization of the AxiPcieCrossbarIpCore
    • Help with getting unused DMA lanes' BRAM and LUTs optimized away

adding hardware/SlacPgpCardG4
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Mon Dec 9 13:56:06 2019 -0800
Pull: #46 (1726 additions, 0 deletions, 25 files changed)
Branch: slaclab/SlacPgpCardG4

Notes:

Description

  • adding hardware/SlacPgpCardG4
  • renaming SlacPgpCardGen3 to SlacPgpCardG3
Assets 2
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Major Release

21 Nov 16:40
@ruck314 ruck314
v3.0.0
333ed1a
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Major Release

Pull Requests

  1. #45 - v3.0.0 release candidate
  2. #43 - Refactor for use of VHDL Libraries
  3. #44 - Refactor for new memory generics in SURF

Pull Request Details

v3.0.0 release candidate
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Thu Nov 21 08:39:26 2019 -0800
Pull: #45 (980 additions, 553 deletions, 109 files changed)
Branch: slaclab/pre-release

Notes:

Description

  • Refactor for use of VHDL Libraries #43
  • Refactor for new memory generics in SURF #44

Refactor for use of VHDL Libraries
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Mon Nov 18 15:56:54 2019 -0800
Pull: #43 (820 additions, 540 deletions, 107 files changed)
Branch: slaclab/vhdl-lib

Notes:

This change refactors the code to expect SURF and modules and packages to be in a surf VHDL library.

It also refactors the code to place it's own modules and packages in an axi_pcie_core library.

This PR can't be merged until the corresponding changes in surf are merged.

Refactor for new memory generics in SURF
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Tue Nov 19 13:49:45 2019 -0800
Pull: #44 (9 additions, 9 deletions, 2 files changed)
Branch: slaclab/memeory_type_g

Notes:

The BRAM_EN_G generic is now MEMORY_TYPE_G.

Assets 2
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Patch Release

23 Oct 16:56
@ruck314 ruck314
v2.2.1
5080a83
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Patch Release

Pull Requests

  1. #42 - v2.2.1 release candidate

Pull Request Details

v2.2.1 release candidate
Author: Larry Ruckman ruckman@slac.stanford.edu
Date: Wed Oct 23 09:55:01 2019 -0700
Pull: #42 (275 additions, 20 deletions, 11 files changed)
Branch: slaclab/pre-release

Notes:

Description

  • Updating the Ultrascale+ builds to use URAM for the DMA descriptors
  • ip/MigClkConvt reorg.
  • updating surf and ruckus submodule locks
Assets 2
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