Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[Edgecore][AS9716]Provide psu_fan_dir sysfs #12016

Open
wants to merge 2 commits into
base: master
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Jump to
Jump to file
Failed to load files.
Diff view
Diff view

This file was deleted.

88 changes: 44 additions & 44 deletions device/accton/x86_64-accton_as9716_32d-r0/plugins/sfputil.py
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@
class SfpUtil(SfpUtilBase):
"""Platform-specific SfpUtil class"""

PORT_START = 0
PORT_END = 33
PORT_START = 1
PORT_END = 34
PORTS_IN_BLOCK = 34

BASE_OOM_PATH = "/sys/bus/i2c/devices/{0}-0050/"
Expand All @@ -29,40 +29,40 @@ class SfpUtil(SfpUtilBase):

_port_to_eeprom_mapping = {}
_port_to_i2c_mapping = {
0: [1, 25],
1: [2, 26],
2: [3, 27],
3: [4, 28],
4: [5, 29],
5: [6, 30],
6: [7, 31],
7: [8, 32],
8: [9, 33],
9: [10, 34],
10: [11, 35],
11: [12, 36],
12: [13, 37],
13: [14, 38],
14: [15, 39],
15: [16, 40],
16: [17, 41],
17: [18, 42],
18: [19, 43],
19: [20, 44],
20: [21, 45],
21: [22, 46],
22: [23, 47],
23: [24, 48],
24: [25, 49],
25: [26, 50],
26: [27, 51],
27: [28, 52],
28: [29, 53],
29: [30, 54],
30: [31, 55],
31: [32, 56],
32: [33, 57],
33: [34, 58],
1: 25,
2: 26,
3: 27,
4: 28,
5: 29,
6: 30,
7: 31,
8: 32,
9: 33,
10: 34,
11: 35,
12: 36,
13: 37,
14: 38,
15: 39,
16: 40,
17: 41,
18: 42,
19: 43,
20: 44,
21: 45,
22: 46,
23: 47,
24: 48,
25: 49,
26: 50,
27: 51,
28: 52,
29: 53,
30: 54,
31: 55,
32: 56,
33: 57,
34: 58,
}

@property
Expand All @@ -84,9 +84,9 @@ def port_to_eeprom_mapping(self):
def __init__(self):
eeprom_path = self.BASE_OOM_PATH + "eeprom"

for x in range(0, self.port_end+1):
for x in range(self.port_start, self.port_end+1):
self.port_to_eeprom_mapping[x] = eeprom_path.format(
self._port_to_i2c_mapping[x][1]
self._port_to_i2c_mapping[x]
)

SfpUtilBase.__init__(self)
Expand All @@ -95,10 +95,10 @@ def get_presence(self, port_num):
# Check for invalid port_num
if port_num < self.port_start or port_num > self.port_end:
return False
if port_num < 16:
present_path = self.BASE_CPLD1_PATH + "module_present_" + str(port_num+1)
if port_num <= 16:
present_path = self.BASE_CPLD1_PATH + "module_present_" + str(port_num)
else:
present_path = self.BASE_CPLD2_PATH + "module_present_" + str(port_num+1)
present_path = self.BASE_CPLD2_PATH + "module_present_" + str(port_num)
self.__port_to_is_present = present_path

content = "0"
Expand Down Expand Up @@ -181,7 +181,7 @@ def reset(self, port_num):
if port_num < self.port_start or port_num > self.port_end:
return False

if port_num < 16:
if port_num <= 16:
mod_rst_path = self.BASE_CPLD1_PATH + "module_reset_" + str(port_num+1)
else:
mod_rst_path = self.BASE_CPLD2_PATH + "module_reset_" + str(port_num+1)
Expand All @@ -208,8 +208,8 @@ def get_cpld_interrupt(self):
else:
cpld_i2c_path = self.BASE_CPLD2_PATH + "cpld_intr_" + str(i+1)

start_i = (i*8)
end_i = (i*8+8)
start_i = (i*8)+1
end_i = (i*8+8)+1
try:
val_file = open(cpld_i2c_path)
except IOError as e:
Expand Down