net/mlx4: fix secondary process initialization ordering

[ upstream commit e5d94cf ]

The memory barrier is used to ensure that the response is returned
only after the Tx/Rx function is set, it should place after the Rx/Tx
function is set.

Fixes: 0203d33 ("net/mlx4: support secondary process")

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

drivers/net/mlx4/mlx4_mp.c

@@ -126,7 +126,6 @@ mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer)
 	switch (param->type) {
 	case MLX4_MP_REQ_START_RXTX:
 		INFO("port %u starting datapath", dev->data->port_id);
-		rte_mb();
 		dev->tx_pkt_burst = mlx4_tx_burst;
 		dev->rx_pkt_burst = mlx4_rx_burst;
 #ifdef HAVE_IBV_MLX4_UAR_MMAP_OFFSET
@@ -144,6 +143,7 @@ mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer)
 			}
 		}
 #endif
+		rte_mb();
 		mp_init_msg(dev, &mp_res, param->type);
 		res->result = 0;
 		ret = rte_mp_reply(&mp_res, peer);