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net/hns3: fix FLR miss detection
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[ upstream commit 32040ae ]

When FLR occurs, the head pointer register of
the command queue will be cleared, resulting in
abnormal detection of the head pointer register
of the command queue. At present, FLR is detected
in this way, and the reset recovery process is
executed.

However, when FLR occurs, the header pointer
register of the command queue is not necessarily
abnormal. For example, when the driver runs
normally, the value of the header pointer register
of the command queue may also be 0, which will
lead to the miss detection of FLR.

Therefore, the judgment that whether the base
address register of command queue is 0 is added
to ensure that FLR not miss detection.

Fixes: 2790c64 ("net/hns3: support device reset")

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
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Hongbo Zheng authored and steevenlee committed May 8, 2021
1 parent 539f3b7 commit c718e75
Showing 1 changed file with 5 additions and 3 deletions.
8 changes: 5 additions & 3 deletions drivers/net/hns3/hns3_cmd.c
Original file line number Diff line number Diff line change
Expand Up @@ -195,12 +195,14 @@ hns3_cmd_csq_clean(struct hns3_hw *hw)
{
struct hns3_cmq_ring *csq = &hw->cmq.csq;
uint32_t head;
uint32_t addr;
int clean;

head = hns3_read_dev(hw, HNS3_CMDQ_TX_HEAD_REG);
if (!is_valid_csq_clean_head(csq, head)) {
hns3_err(hw, "wrong cmd head (%u, %u-%u)", head,
csq->next_to_use, csq->next_to_clean);
addr = hns3_read_dev(hw, HNS3_CMDQ_TX_ADDR_L_REG);
if (!is_valid_csq_clean_head(csq, head) || addr == 0) {
hns3_err(hw, "wrong cmd addr(%0x) head (%u, %u-%u)", addr, head,
csq->next_to_use, csq->next_to_clean);
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
rte_atomic16_set(&hw->reset.disable_cmd, 1);
hns3_schedule_delayed_reset(HNS3_DEV_HW_TO_ADAPTER(hw));
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