-
Notifications
You must be signed in to change notification settings - Fork 522
/
syn-rules.y
431 lines (342 loc) · 10.5 KB
/
syn-rules.y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
%{
/*
* Copyright (c) 2000 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*/
#if !defined(WINNT) && !defined(macintosh)
#ident "$Id: syn-rules.y,v 1.14 2001/08/25 23:50:03 steve Exp $"
#endif
# include "config.h"
# include <iostream>
/*
* This file implements synthesys based on matching threads and
* converting them to equivilent devices. The trick here is that the
* proc_match_t functor can be used to scan a process and generate a
* string of tokens. That string of tokens can then be matched by the
* rules to determin what kind of device is to be made.
*/
# include "netlist.h"
# include "netmisc.h"
# include "functor.h"
# include <assert.h>
struct syn_token_t {
int token;
NetAssignBase*assign;
NetAssignMem_*assign_mem;
NetProcTop*top;
NetEvWait*evwait;
NetEvent*event;
NetExpr*expr;
syn_token_t*next_;
};
#define YYSTYPE syn_token_t*
static int yylex();
static void yyerror(const char*);
static Design*des_;
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn);
static void make_RAM_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
NetEvent*eclk, NetExpr*cexp, NetAssignMem_*asn);
static void make_initializer(Design*des, NetProcTop*top, NetAssignBase*asn);
%}
%token S_ALWAYS S_ASSIGN S_ASSIGN_MEM S_ASSIGN_MUX S_ELSE S_EVENT
%token S_EXPR S_IF S_INITIAL
%%
start
/* These rules match simple DFF devices. Clocked assignments are
simply implemented as DFF, and a CE is easily expressed with a
conditional statement. The typical Verilog that get these are:
always @(posedge CLK) Q = D
always @(negedge CLK) Q = D
always @(posedge CLK) if (CE) Q = D;
always @(negedge CLK) if (CE) Q = D;
The width of Q and D cause a wide register to be created. The
code generators generally implement that as an array of
flip-flops. */
: S_ALWAYS '@' '(' S_EVENT ')' S_ASSIGN ';'
{ make_DFF_CE(des_, $1->top, $2->evwait, $4->event,
0, $6->assign);
}
| S_ALWAYS '@' '(' S_EVENT ')' S_IF S_EXPR S_ASSIGN ';' ';'
{ make_DFF_CE(des_, $1->top, $2->evwait, $4->event,
$7->expr, $8->assign);
}
/* Unconditional assignments in initial blocks should be made into
initializers wherever possible. */
| S_INITIAL S_ASSIGN
{ make_initializer(des_, $1->top, $2->assign);
}
/* These rules match RAM devices. They are similar to DFF, except
that there is an index for the word. The typical Verilog that get
these are:
always @(posedge CLK) M[a] = D
always @(negedge CLK) M[a] = D
always @(posedge CLK) if (CE) M[a] = D;
always @(negedge CLK) if (CE) M[a] = D;
The width of Q and D cause a wide register to be created. The
code generators generally implement that as an array of
flip-flops. */
| S_ALWAYS '@' '(' S_EVENT ')' S_ASSIGN_MEM ';'
{ make_RAM_CE(des_, $1->top, $2->evwait, $4->event,
0, $6->assign_mem);
}
| S_ALWAYS '@' '(' S_EVENT ')' S_IF S_EXPR S_ASSIGN_MEM ';' ';'
{ make_RAM_CE(des_, $1->top, $2->evwait, $4->event,
$7->expr, $8->assign_mem);
}
;
%%
/* Various actions. */
static void make_DFF_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
NetEvent*eclk, NetExpr*cexp, NetAssignBase*asn)
{
assert(asn);
NetEvProbe*pclk = eclk->probe(0);
NetESignal*d = dynamic_cast<NetESignal*> (asn->rval());
NetNet*ce = cexp? cexp->synthesize(des) : 0;
if (d == 0) {
cerr << asn->get_line() << ": internal error: "
<< " not a simple signal? " << *asn->rval() << endl;
}
assert(d);
NetFF*ff = new NetFF(top->scope(), asn->l_val(0)->name(),
asn->l_val(0)->lwidth());
for (unsigned idx = 0 ; idx < ff->width() ; idx += 1) {
connect(ff->pin_Data(idx), d->bit(idx));
connect(ff->pin_Q(idx), asn->l_val(0)->sig()->pin(idx));
}
connect(ff->pin_Clock(), pclk->pin(0));
if (ce) connect(ff->pin_Enable(), ce->pin(0));
ff->attribute("LPM_FFType", "DFF");
if (pclk->edge() == NetEvProbe::NEGEDGE)
ff->attribute("Clock:LPM_Polarity", "INVERT");
des->add_node(ff);
des->delete_process(top);
}
static void make_RAM_CE(Design*des, NetProcTop*top, NetEvWait*wclk,
NetEvent*eclk, NetExpr*cexp, NetAssignMem_*asn)
{
NetMemory*mem = asn->memory();
NetExpr*adr_e = asn->index();
NetNet*adr = adr_e->synthesize(des);
assert(adr);
NetEvProbe*pclk = eclk->probe(0);
NetESignal*d = dynamic_cast<NetESignal*> (asn->rval());
NetNet*ce = cexp? cexp->synthesize(des) : 0;
assert(d);
NetRamDq*ram = new NetRamDq(des->local_symbol(mem->name()), mem,
adr->pin_count());
for (unsigned idx = 0 ; idx < adr->pin_count() ; idx += 1)
connect(adr->pin(idx), ram->pin_Address(idx));
for (unsigned idx = 0 ; idx < ram->width() ; idx += 1)
connect(ram->pin_Data(idx), d->bit(idx));
if (ce) connect(ram->pin_WE(), ce->pin(0));
assert(pclk->edge() == NetEvProbe::POSEDGE);
connect(ram->pin_InClock(), pclk->pin(0));
ram->absorb_partners();
des->add_node(ram);
des->delete_process(top);
}
/*
* An assignment in an initial statement is the same as giving the
* nexus an initial value. For synthesized netlists, we can just set
* the initial value for the link and get rid of the assignment
* process.
*/
static void make_initializer(Design*des, NetProcTop*top, NetAssignBase*asn)
{
NetESignal*rsig = dynamic_cast<NetESignal*> (asn->rval());
assert(rsig);
for (unsigned idx = 0 ; idx < asn->l_val(0)->lwidth() ; idx += 1) {
verinum::V bit = driven_value(rsig->bit(idx));
Nexus*nex = asn->l_val(0)->sig()->pin(idx).nexus();
for (Link*cur = nex->first_nlink()
; cur ; cur = cur->next_nlink()) {
if (NetNet*net = dynamic_cast<NetNet*> (cur->get_obj()))
cur->set_init(bit);
}
}
des->delete_process(top);
}
static syn_token_t*first_ = 0;
static syn_token_t*last_ = 0;
static syn_token_t*ptr_ = 0;
/*
* The match class is used to take a process and turn it into a stream
* of tokens. This stream is used by the yylex function to feed tokens
* to the parser.
*/
struct tokenize : public proc_match_t {
tokenize() { }
~tokenize() { }
int assign(NetAssign*dev)
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = dev->l_val(0)->bmux() ? S_ASSIGN_MUX : S_ASSIGN;
cur->assign = dev;
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
return 0;
}
int assign_nb(NetAssignNB*dev)
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = dev->l_val(0)->bmux() ? S_ASSIGN_MUX : S_ASSIGN;
cur->assign = dev;
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
return 0;
}
int assign_mem(NetAssignMem*dev)
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = S_ASSIGN_MEM;
cur->assign_mem = dev;
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
return 0;
}
int assign_mem_nb(NetAssignMemNB*dev)
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = S_ASSIGN_MEM;
cur->assign_mem = dev;
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
return 0;
}
int condit(NetCondit*dev)
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = S_IF;
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
cur = new syn_token_t;
cur->token = S_EXPR;
cur->expr = dev->expr();
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
dev -> if_clause() -> match_proc(this);
if (dev->else_clause()) {
cur = new syn_token_t;
cur->token = S_ELSE;
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
dev -> else_clause() -> match_proc(this);
}
cur = new syn_token_t;
cur->token = ';';
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
return 0;
}
int event_wait(NetEvWait*dev)
{
syn_token_t*cur;
cur = new syn_token_t;
cur->token = '@';
cur->evwait = dev;
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
cur = new syn_token_t;
cur->token = '(';
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
for (unsigned idx = 0; idx < dev->nevents(); idx += 1) {
cur = new syn_token_t;
cur->token = S_EVENT;
cur->event = dev->event(idx);
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
}
cur = new syn_token_t;
cur->token = ')';
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
dev -> statement() -> match_proc(this);
cur = new syn_token_t;
cur->token = ';';
cur->next_ = 0;
last_->next_ = cur;
last_ = cur;
return 0;
}
};
static void syn_start_process(NetProcTop*t)
{
first_ = new syn_token_t;
last_ = first_;
ptr_ = first_;
first_->token = (t->type() == NetProcTop::KALWAYS)? S_ALWAYS : S_INITIAL;
first_->top = t;
first_->next_ = 0;
tokenize go;
t -> statement() -> match_proc(&go);
}
static void syn_done_process()
{
while (first_) {
syn_token_t*cur = first_;
first_ = cur->next_;
delete cur;
}
}
static int yylex()
{
if (ptr_ == 0) {
yylval = 0;
return EOF;
}
yylval = ptr_;
ptr_ = ptr_->next_;
return yylval->token;
}
struct syn_rules_f : public functor_t {
~syn_rules_f() { }
void process(class Design*des, class NetProcTop*top)
{
syn_start_process(top);
yyparse();
syn_done_process();
}
};
void syn_rules(Design*d)
{
des_ = d;
syn_rules_f obj;
des_->functor(&obj);
}
static void yyerror(const char*)
{
}