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Cleanup after parameter expression rework.
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This patch removes some code made redundant by the rework of
parameter expression evaluation. It also documents the new
-g option.
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@martinwhitaker @steveicarus
martinwhitaker authored and steveicarus committed Dec 6, 2010
1 parent 275dde7 commit b89ab1f
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Showing 17 changed files with 28 additions and 704 deletions.
2 changes: 1 addition & 1 deletion Makefile.in
View file
Expand Up @@ -92,7 +92,7 @@ TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-dll-analog.o
FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o

O = main.o async.o design_dump.o discipline.o dup_expr.o elaborate.o \
elab_expr.o elaborate_analog.o elab_lval.o elab_net.o elab_pexpr.o \
elab_expr.o elaborate_analog.o elab_lval.o elab_net.o \
elab_scope.o elab_sig.o elab_sig_analog.o emit.o eval.o eval_attrib.o \
eval_tree.o expr_synth.o functor.o lexor.o lexor_keyword.o link_const.o \
load_module.o netlist.o netmisc.o net_analog.o net_assign.o net_design.o \
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3 changes: 0 additions & 3 deletions Module.h
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Expand Up @@ -146,9 +146,6 @@ class Module : public PScope, public LineInfo {
private:
list<PGate*> gates_;

static void elaborate_parm_item_(perm_string name, const param_expr_t&cur,
Design*des, NetScope*scope);

private: // Not implemented
Module(const Module&);
Module& operator= (const Module&);
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36 changes: 10 additions & 26 deletions PExpr.h
View file
Expand Up @@ -110,12 +110,6 @@ class PExpr : public LineInfo {
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
int expr_width, bool sys_task_arg) const;

// Elaborate expressions that are the r-value of parameter
// assignments. This elaboration follows the restrictions of
// constant expressions and supports later overriding and
// evaluation of parameters.
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;

// This method elaborates the expression as gates, but
// restricted for use as l-values of continuous assignments.
virtual NetNet* elaborate_lnet(Design*des, NetScope*scope) const;
Expand Down Expand Up @@ -179,7 +173,6 @@ class PEConcat : public PExpr {
virtual NetNet* elaborate_bi_net(Design*des, NetScope*scope) const;
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
int expr_width, bool sys_task_arg) const;
virtual NetEConcat*elaborate_pexpr(Design*des, NetScope*) const;
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const;
Expand Down Expand Up @@ -244,7 +237,6 @@ class PEFNumber : public PExpr {
bool&unsized_flag);
virtual NetExpr*elaborate_expr(Design*des, NetScope*,
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;

virtual void dump(ostream&) const;

Expand Down Expand Up @@ -286,7 +278,6 @@ class PEIdent : public PExpr {

virtual NetExpr*elaborate_expr(Design*des, NetScope*,
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;

// Elaborate the PEIdent as a port to a module. This method
// only applies to Ident expressions.
Expand Down Expand Up @@ -405,7 +396,6 @@ class PENumber : public PExpr {

virtual NetEConst*elaborate_expr(Design*des, NetScope*,
int expr_width, bool) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual NetAssign_* elaborate_lval(Design*des,
NetScope*scope,
bool is_force) const;
Expand Down Expand Up @@ -441,7 +431,6 @@ class PEString : public PExpr {

virtual NetEConst*elaborate_expr(Design*des, NetScope*,
int expr_width, bool) const;
virtual NetEConst*elaborate_pexpr(Design*des, NetScope*sc) const;
verinum* eval_const(Design*, NetScope*) const;

private:
Expand All @@ -467,7 +456,6 @@ class PEUnary : public PExpr {

virtual NetExpr*elaborate_expr(Design*des, NetScope*,
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(Design*des, NetScope*sc) const;

private:
Expand Down Expand Up @@ -497,7 +485,6 @@ class PEBinary : public PExpr {

virtual NetExpr*elaborate_expr(Design*des, NetScope*,
int expr_width, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(Design*des, NetScope*sc) const;

protected:
Expand All @@ -506,19 +493,22 @@ class PEBinary : public PExpr {
PExpr*right_;

NetExpr*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid, bool is_pexpr =false) const;
int use_wid) const;
NetExpr*elaborate_eval_expr_base_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid) const;

NetExpr*elaborate_expr_base_bits_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
NetExpr*elaborate_expr_base_bits_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid) const;
NetExpr*elaborate_expr_base_div_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid, bool is_pexpr) const;
NetExpr*elaborate_expr_base_lshift_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
NetExpr*elaborate_expr_base_rshift_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
int use_wid) const;
NetExpr*elaborate_expr_base_lshift_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid) const;
NetExpr*elaborate_expr_base_rshift_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid) const;
NetExpr*elaborate_expr_base_mult_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid, bool is_pexpr) const;
int use_wid) const;
NetExpr*elaborate_expr_base_add_(Design*, NetExpr*lp, NetExpr*rp,
int use_wid, bool is_pexpr) const;
int use_wid) const;

};

Expand All @@ -539,7 +529,6 @@ class PEBComp : public PEBinary {

NetExpr* elaborate_expr(Design*des, NetScope*scope,
int expr_width, bool sys_task_arg) const;
NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;

private:
int left_width_;
Expand All @@ -562,7 +551,6 @@ class PEBLogic : public PEBinary {

NetExpr* elaborate_expr(Design*des, NetScope*scope,
int expr_width, bool sys_task_arg) const;
NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
};

/*
Expand All @@ -588,8 +576,6 @@ class PEBLeftWidth : public PEBinary {
virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
int expr_width, bool sys_task_arg) const;

virtual NetExpr*elaborate_pexpr(Design*des, NetScope*scope) const;

};

class PEBPower : public PEBLeftWidth {
Expand Down Expand Up @@ -635,7 +621,6 @@ class PETernary : public PExpr {

virtual NetExpr*elaborate_expr(Design*des, NetScope*,
int expr_width, bool sys_task_arg) const;
virtual NetETernary*elaborate_pexpr(Design*des, NetScope*sc) const;
virtual verinum* eval_const(Design*des, NetScope*sc) const;

private:
Expand Down Expand Up @@ -674,7 +659,6 @@ class PECallFunction : public PExpr {

virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
int expr_wid, bool sys_task_arg) const;
virtual NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;

virtual unsigned test_width(Design*des, NetScope*scope,
unsigned min, unsigned lval,
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4 changes: 1 addition & 3 deletions README.txt
View file
Expand Up @@ -184,8 +184,7 @@ first, followed by the structural and behavioral elaboration.
This pass scans through the pform looking for scopes and parameters. A
tree of NetScope objects is built up and placed in the Design object,
with the root module represented by the root NetScope object. The
elab_scope.cc and elab_pexpr.cc files contain most of the code for
handling this phase.
elab_scope.cc file contains most of the code for handling this phase.

The tail of the elaborate_scope behavior (after the pform is
traversed) includes a scan of the NetScope tree to locate defparam
Expand Down Expand Up @@ -476,4 +475,3 @@ file. However, I have early on received aid in the form of fixes,
Verilog guidance, and especially testing from many people. Testers in
particular include a larger community of people interested in a GPL
Verilog for Linux.

1 change: 0 additions & 1 deletion compiler.h
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Expand Up @@ -98,7 +98,6 @@ extern bool verbose_flag;
extern bool debug_scopes;
extern bool debug_eval_tree;
extern bool debug_elaborate;
extern bool debug_elab_pexpr;
extern bool debug_synth2;
extern bool debug_optimizer;

Expand Down
8 changes: 0 additions & 8 deletions design_dump.cc
View file
Expand Up @@ -1504,14 +1504,6 @@ void NetESignal::dump(ostream&o) const
o << "[" << msi()<<":"<<lsi() << "]";
}

void NetEParam::dump(ostream&o) const
{
if (scope_ != 0)
o << "<" << scope_path(scope_) << "." << (*reference_).first << ">";
else
o << "<" << (*reference_).first << ">";
}

void NetETernary::dump(ostream&o) const
{
o << "(" << *cond_ << ") ? (" << *true_val_ << ") : (" <<
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5 changes: 5 additions & 0 deletions driver/iverilog.man.in
View file
Expand Up @@ -121,6 +121,11 @@ has side effects, the resulting behavior will differ from that
required by the standard. Using \fI\-gstrict\-ca\-eval\fP will force
standard compliant behavior (with some loss in performance).
.TP 8
.B -gstrict-expr-width\fI|\fP-gno-strict-expr-width
Enable or disable (default) strict compliance with the standard rules
for determining expression bit lengths. When disabled, the RHS of a
parameter assignment is evaluated as a lossless expression.
.TP 8
.B -I\fIincludedir\fP
Append directory \fIincludedir\fP to list of directories searched
for Verilog include files. The \fB\-I\fP switch may be used many times
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21 changes: 9 additions & 12 deletions elab_expr.cc
View file
Expand Up @@ -332,7 +332,7 @@ NetExpr* PEBinary::elaborate_eval_expr_base_(Design*des,
*/
NetExpr* PEBinary::elaborate_expr_base_(Design*des,
NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const
int expr_wid) const
{
if (debug_elaborate) {
cerr << get_fileline() << ": debug: elaborate expression "
Expand Down Expand Up @@ -362,12 +362,12 @@ NetExpr* PEBinary::elaborate_expr_base_(Design*des,
break;

case '*':
tmp = elaborate_expr_base_mult_(des, lp, rp, expr_wid, is_pexpr);
tmp = elaborate_expr_base_mult_(des, lp, rp, expr_wid);
break;

case '%':
case '/':
tmp = elaborate_expr_base_div_(des, lp, rp, expr_wid, is_pexpr);
tmp = elaborate_expr_base_div_(des, lp, rp, expr_wid);
break;

case 'l':
Expand All @@ -391,7 +391,7 @@ NetExpr* PEBinary::elaborate_expr_base_(Design*des,

case '+':
case '-':
tmp = elaborate_expr_base_add_(des, lp, rp, expr_wid, is_pexpr);
tmp = elaborate_expr_base_add_(des, lp, rp, expr_wid);
break;

case 'E': /* === */
Expand Down Expand Up @@ -452,7 +452,7 @@ NetExpr* PEBinary::elaborate_expr_base_bits_(Design*des,

NetExpr* PEBinary::elaborate_expr_base_div_(Design*des,
NetExpr*lp, NetExpr*rp,
int expr_wid, bool) const
int expr_wid) const
{
/* The % operator does not support real arguments in
baseline Verilog. But we allow it in our extended
Expand Down Expand Up @@ -744,7 +744,7 @@ NetExpr* PEBinary::elaborate_expr_base_rshift_(Design*des,

NetExpr* PEBinary::elaborate_expr_base_mult_(Design*,
NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const
int expr_wid) const
{
// First, Make sure that signed arguments are padded to the
// width of the output. This is necessary for 2s complement
Expand Down Expand Up @@ -785,9 +785,7 @@ NetExpr* PEBinary::elaborate_expr_base_mult_(Design*,
// If this expression is unsigned, then make sure the
// arguments are unsigned so that the padding below doesn't
// cause any sign extension to happen.
if (! is_pexpr)
suppress_binary_operand_sign_if_needed(lp, rp);

suppress_binary_operand_sign_if_needed(lp, rp);

// Multiply will guess a width that is the sum of the
// widths of the operand. If that sum is too small, then
Expand All @@ -807,7 +805,7 @@ NetExpr* PEBinary::elaborate_expr_base_mult_(Design*,

NetExpr* PEBinary::elaborate_expr_base_add_(Design*,
NetExpr*lp, NetExpr*rp,
int expr_wid, bool is_pexpr) const
int expr_wid) const
{
NetExpr*tmp;
bool use_lossless_flag = expr_wid == -2;
Expand All @@ -823,8 +821,7 @@ NetExpr* PEBinary::elaborate_expr_base_add_(Design*,
// If the expression is unsigned, then force the operands to
// unsigned so that the set_width below doesn't cause them to
// be sign-extended.
if (! is_pexpr)
suppress_binary_operand_sign_if_needed(lp, rp);
suppress_binary_operand_sign_if_needed(lp, rp);

tmp = new NetEBAdd(op_, lp, rp, use_lossless_flag);
if (expr_wid > 0 && type_is_vectorable(tmp->expr_type()))
Expand Down

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