Skip to content

Commit

Permalink
Real variables now work, remove from unsupported list.
Browse files Browse the repository at this point in the history
  • Loading branch information
steve committed Feb 1, 2003
1 parent fec6a10 commit e3d6c29
Showing 1 changed file with 0 additions and 4 deletions.
4 changes: 0 additions & 4 deletions README.txt
Expand Up @@ -296,10 +296,6 @@ Verilog web page for the current state of support for Verilog, and in
particular, browse the bug report database for reported unsupported
constructs.

- real data types not supported. This includes real and
realtime. However, floating point constants in delay expressions
are supported so that `timescale works properly.

- System functions are supported, but the compiler presumes that
they return 32 bits. This is the typical case.

Expand Down

0 comments on commit e3d6c29

Please sign in to comment.