Merge #558

558: Fix write constraints for USART RDR and TDR registers r=adamgreig a=sirhcel

The STM32F303 has 9 bit wide RDR and TDR registers and according to the SVDs this is the case for all other devices with this peripheral too. Make accessing TDR via tdr().bits() safe again by providing the appropriate constraints.

I stumbled upon this issue in rust-embedded/discovery#267 (comment).

The currently exisiting bitWidths have been quick-and-dirty checked using:
```bash
svd $ xmllint --xpath ".//field[(name = 'RDR' or name = 'TDR') and bitWidth != 9]" --format *.svd *.svd.patched
```
This gave not output while searching for `bitWidth = 9` did.

Co-authored-by: Christian Meusel <christian.meusel@posteo.de>

peripherals/usart/_v2_ABC_common.yaml

@@ -144,6 +144,6 @@ ICR:
   PECF:
     Clear: [1, "Clears the PE flag in the ISR register"]
 RDR:
-  RDR: [0, 0xFF]
+  RDR: [0, 0x1FF]
 TDR:
-  TDR: [0, 0xFF]
+  TDR: [0, 0x1FF]