⚠️ replace SYSINFO.CPU memory-mapped register by custom "mxisa" CSR #276
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+ minor VHDL clean-ups & edits
from sw/example/blink_led; updated due to changes in RTE
remove NEORV32_SYSINFO.CPU memory-mapped register; replaced by new custom `mxisa` CSR
added more internal links/references
* typo fix in comment * added some more non-essential std libs
stnolting
changed the title
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This PR replaces the SYSINFO's "CPU" information register (
NEORV32_SYSINFO.CLK) by a new custom CPU CSR for "extended ISA and Extension Information" (mxisa). By providing a CPU-internal CSR to help software discover available ISA sub-extensions (likeZfinx) this feature is also available to setups that use the NEORV32 CPU in stand-alone mode (-> Litex #115; @enjoy-digital).xmisaCSR is mapped to the "custom machine-mode read-only" CSR address space at0xfc0.NEORV32_SYSINFO.CPUmemory-mapped register is removed (the according address reads as zero and is reserved for future use).mxisashows up as "csr_mxisa" when runninginfo all-registers.