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[rtl] instruction prefetch buffer (IPB) improvements #455

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merged 8 commits into from Dec 14, 2022

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The CPU_IPB_ENTRIES generic (defining the depth of the instruction prefetch buffer) can now be as small as "1". If the C ISA extensions is enabled and CPU_IPB_ENTRIES = 1 is configured, the actual IPB depth is set to "2" automatically (as this is required for handling unaligned 32bit instructions).

Configuring CPU_IPB_ENTRIES = 1 allows reduced hardware utilization. The exemplary hardware implementation results have been updated accordingly.

add override: if C ISA extension is enabled and the IP depth is configured to be "1", the IPB size is overriden to auto-configure an IPB depth of 2
@stnolting stnolting added enhancement New feature or request HW hardware-related labels Dec 13, 2022
@stnolting stnolting self-assigned this Dec 13, 2022
@stnolting stnolting marked this pull request as ready for review December 13, 2022 21:20
@stnolting stnolting merged commit ba2fc97 into main Dec 14, 2022
@stnolting stnolting deleted the ipb_improvements branch December 14, 2022 05:55
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