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馃悰 [rtl] fix MEPC value for instruction access faults #458

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merged 7 commits into from Dec 17, 2022
Merged

馃悰 [rtl] fix MEPC value for instruction access faults #458

merged 7 commits into from Dec 17, 2022

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According to RISC-V priv. spec. the xEPC CSRs have to point to the address that caused an "instruction access fault" exception:

3.1.16 Machine Trap Value Register (mtval)
[...]
If mtval is written with a nonzero value when an instruction access-fault or page-fault exception occurs on a system with variable-length instructions, then mtval will contain the virtual address of the portion of the instruction that caused the fault, while mepc will point to the beginning of the instruction.

See riscv/riscv-isa-manual#938

@stnolting
[sw/lib] RTE: minor optimizations
034345c
@stnolting
[sw/example] modify i-access exception test
e7cb75f 
for instruction fetch access exceptions MEPC has to point to the address that caused the exception (i.e. the failing instruction fetch itself)
@stnolting stnolting added bug Something isn't working risc-v compliance Modification to comply with official RISC-V specs. HW hardware-related labels Dec 17, 2022
@stnolting stnolting self-assigned this Dec 17, 2022
@stnolting stnolting marked this pull request as ready for review December 17, 2022 20:43
@stnolting stnolting merged commit 2b92a7c into main Dec 17, 2022
@stnolting stnolting deleted the iacc_mepc_fix branch December 17, 2022 20:53
cronomantic pushed a commit to cronomantic/neorv32 that referenced this pull request Dec 17, 2022
@stnolting
馃悰 [rtl] fix MEPC value for instruction access faults (stnolting#458)
8a21ef4 
* [sw/lib] RTE: minor optimizations

* [sw/example] modify i-access exception test

for instruction fetch access exceptions MEPC has to point to the address that caused the exception (i.e. the failing instruction fetch itself)

* [docs] add warning regarding non-resumable exceptions

* [CHANGELOG] add v1.7.8.8

* [sw/example] processor_check: minor cleanup

* 馃悰 [rtl] fix xEPC value on instruction access fault

* [rtl] minor edit

add missing default level dcsr.cause CSR
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