Add support for page fault exceptions #786
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add page fault exceptions
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This PR adds support for three additional RISC-V exceptions:
mcause = 0x0000000c)mcause = 0x0000000f)mcause = 0x0000000d)Right now the trigger signals for these exceptions are unused and terminated / hardwired to zero within the CPU's top entity. Hence, the hardware overhead for implementing those new trap should be zero.
I am experimenting with a very simple MMU-like paging concept but I am not really sure if this would be beneficial for any "real-world" applications. However, this might be the first step toward supervisor-mode and virtual memory support.
As always, ideas and thoughts are highly welcome. 馃槈