⚠️⚠️ Rename external bus interface

[stnolting]

⚠️ This is a major change!

As this caused some confusion (this bus is not explicitly reserved for connection processor-external memories) the external memory bus interface ("WISHBONE") is renamed: External Bus Interface (XBUS)

• rename generics: MEM_EXT_* -> XBUS_*
• rename Wishbone interface ports: wb_* -> xbus_*
• rename Wishbone gateway rtl file: neorv32_wishbone.vhd -> neorv32_xbus.vhd
• rename all external bus-related flags: MEM_EXT_* -> XBUS_*

[NikLeberg]

Only some forgotten renamings for the docs.
Besides that, it looks good to me. Didn't synthesize and test it though...
The rename makes sence, I remember also being slightly confused. 👍