This project contains a single-cycle CPU and a pipelined CPU modified from the single-cycle one.
A Harvard architecture CPU with MIPS instruction set
Environment: Altera Quartus 15.0
All code (C/Assembly) used to test the CPU is compiled by hand.
-
Notifications
You must be signed in to change notification settings - Fork 0
suix2/CPU
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
Folders and files
Name | Name | Last commit message | Last commit date | |
---|---|---|---|---|
Repository files navigation
About
A Harvard architecture CPU with MIPS instruction set
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published