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[ROCm] Fix for a test failure on the ROCm platform - 200211 - 1 #36671

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Feb 13, 2020
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[ROCm] Fix for a test failure on the ROCm platform - 200211 - 1 #36671

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12 changes: 6 additions & 6 deletions tensorflow/compiler/xla/service/gpu/tests/gpu_kernel_tiling_test.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -374,12 +374,12 @@ TEST_F(GpuKernelTilingTest, ColumnReductionWithPowerOf2OutputElementsUnrolled) {
auto expected_ir = is_built_with_rocm_ ? R"(
; CHECK-LABEL: define amdgpu_kernel void @fusion
;
; CHECK-LABEL: atomic_op_loop_body{{.*}}:
; CHECK-LABEL: atomic_op_loop_body{{[0-9]*}}.atomic_op_loop_body{{[0-9]*}}_crit_edge:
; CHECK: %[[fadd:.*]] = fadd float %{{.*}}, %{{.*}}
; CHECK: %[[bitcast:.*]] = bitcast float %[[fadd]] to i32
; CHECK: %{{.*}} = cmpxchg i32* %{{.*}}, i32 %{{.*}}, i32 %[[bitcast]]
;
; CHECK-LABEL: atomic_op_loop_body{{.*}}:
; CHECK-LABEL: atomic_op_loop_body{{[0-9]*}}.atomic_op_loop_body{{[0-9]*}}_crit_edge:
; CHECK: %[[fadd:.*]] = fadd float %{{.*}}, %{{.*}}
; CHECK: %[[bitcast:.*]] = bitcast float %[[fadd]] to i32
; CHECK: %{{.*}} = cmpxchg i32* %{{.*}}, i32 %{{.*}}, i32 %[[bitcast]]
Expand Down Expand Up @@ -498,22 +498,22 @@ TEST_F(GpuKernelTilingTest, ColumnReductionMOFUnrolled) {
auto expected_ir = is_built_with_rocm_ ? R"(
; CHECK-LABEL: define amdgpu_kernel void @fusion
;
; CHECK-LABEL: atomic_op_loop_body{{.*}}:
; CHECK-LABEL: atomic_op_loop_body{{[0-9]*}}.atomic_op_loop_body{{[0-9]*}}_crit_edge:
; CHECK: %[[fadd:.*]] = fadd float %{{.*}}, %{{.*}}
; CHECK: %[[bitcast:.*]] = bitcast float %[[fadd]] to i32
; CHECK: %{{.*}} = cmpxchg i32* %{{.*}}, i32 %{{.*}}, i32 %[[bitcast]]
;
; CHECK-LABEL: atomic_op_loop_body{{.*}}:
; CHECK-LABEL: atomic_op_loop_body{{[0-9]*}}.atomic_op_loop_body{{[0-9]*}}_crit_edge:
; CHECK: %[[fadd:.*]] = fadd float %{{.*}}, %{{.*}}
; CHECK: %[[bitcast:.*]] = bitcast float %[[fadd]] to i32
; CHECK: %{{.*}} = cmpxchg i32* %{{.*}}, i32 %{{.*}}, i32 %[[bitcast]]
;
; CHECK-LABEL: atomic_op_loop_body{{.*}}:
; CHECK-LABEL: atomic_op_loop_body{{[0-9]*}}.atomic_op_loop_body{{[0-9]*}}_crit_edge:
; CHECK: %[[fadd:.*]] = fadd float %{{.*}}, %{{.*}}
; CHECK: %[[bitcast:.*]] = bitcast float %[[fadd]] to i32
; CHECK: %{{.*}} = cmpxchg i32* %{{.*}}, i32 %{{.*}}, i32 %[[bitcast]]
;
; CHECK-LABEL: atomic_op_loop_body{{.*}}:
; CHECK-LABEL: atomic_op_loop_body{{[0-9]*}}.atomic_op_loop_body{{[0-9]*}}_crit_edge:
; CHECK: %[[fadd:.*]] = fadd float %{{.*}}, %{{.*}}
; CHECK: %[[bitcast:.*]] = bitcast float %[[fadd]] to i32
; CHECK: %{{.*}} = cmpxchg i32* %{{.*}}, i32 %{{.*}}, i32 %[[bitcast]]
Expand Down