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TFLu: fix compilation issue in cmsis-nn/conv.cc #38123

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Apr 15, 2020
Merged

TFLu: fix compilation issue in cmsis-nn/conv.cc #38123

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17 changes: 10 additions & 7 deletions tensorflow/lite/micro/kernels/cmsis-nn/conv.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -129,6 +129,7 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
const TfLiteTensor* output = GetOutput(context, node, kOutputTensor);

RuntimeShape input_shape = GetTensorShape(input);
RuntimeShape output_shape = GetTensorShape(output);

const int input_depth = input_shape.Dims(3);
const int input_width = input->dims->data[2];
Expand All @@ -137,6 +138,7 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
const int filter_height = filter->dims->data[1];
const int output_width = output->dims->data[2];
const int output_height = output->dims->data[1];
const int batches = MatchingDim(input_shape, 0, output_shape, 0);

int* buffer_idx = reinterpret_cast<int*>(node->user_data);

Expand All @@ -148,14 +150,20 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
(input_depth % 4 == 0) && params->stride_width == 1 &&
params->stride_height == 1 && filter_width == 1 && filter_height == 1) {
buf_size = arm_convolve_1x1_s8_fast_get_buffer_size(input_depth);
} else {
}
else if (output_height == 1 && input_height == 1 && filter_height == 1 &&
(output_width % 4 == 0) && batches == 1) {
buf_size = arm_convolve_1_x_n_s8_get_buffer_size(input_depth, filter_width, filter_height);
}
else {
buf_size = arm_convolve_s8_get_buffer_size(input_depth, filter_width,
filter_height);
}

node->user_data = buffer_idx;
if (buf_size > 0) {
context->RequestScratchBufferInArena(context, buf_size, buffer_idx);
TF_LITE_ENSURE_STATUS(context->RequestScratchBufferInArena(
context, buf_size, buffer_idx));
} else {
*buffer_idx = -1;
}
Expand Down Expand Up @@ -268,11 +276,6 @@ TfLiteStatus EvalQuantizedPerChannel(

} else if (output_height == 1 && input_height == 1 && filter_height == 1 &&
(output_width % 4 == 0) && batches == 1) {
const int32_t buf_size = arm_convolve_1_x_n_s8_get_buffer_size(
input_depth, filter_width, filter_height);
if (get_cmsis_scratch_buffer(context, &buf, buf_size) != kTfLiteOk) {
return kTfLiteError;
}
if (arm_convolve_1_x_n_s8(
GetTensorData<int8_t>(input), input_width, input_depth, batches,
GetTensorData<int8_t>(filter), output_depth, filter_width,
Expand Down
3 changes: 2 additions & 1 deletion tensorflow/lite/micro/kernels/cmsis-nn/depthwise_conv.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -129,7 +129,8 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {
input_depth, filter_width, filter_height);

if (buf_size > 0) {
context->RequestScratchBufferInArena(context, buf_size, buffer_idx);
TF_LITE_ENSURE_STATUS(context->RequestScratchBufferInArena(
context, buf_size, buffer_idx));
}
}
#endif
Expand Down
3 changes: 2 additions & 1 deletion tensorflow/lite/micro/kernels/cmsis-nn/fully_connected.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -93,7 +93,8 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {

node->user_data = buffer_idx;
if (buf_size > 0) {
context->RequestScratchBufferInArena(context, buf_size, buffer_idx);
TF_LITE_ENSURE_STATUS(context->RequestScratchBufferInArena(
context, buf_size, buffer_idx));
} else {
*buffer_idx = -1;
}
Expand Down
3 changes: 2 additions & 1 deletion tensorflow/lite/micro/kernels/cmsis-nn/pooling.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -237,7 +237,8 @@ TfLiteStatus Prepare(TfLiteContext* context, TfLiteNode* node) {

node->user_data = buffer_idx;
if (buffer_size > 0) {
context->RequestScratchBufferInArena(context, buffer_size, buffer_idx);
TF_LITE_ENSURE_STATUS(context->RequestScratchBufferInArena(
context, buffer_size, buffer_idx));
} else {
*buffer_idx = -1;
}
Expand Down
4 changes: 2 additions & 2 deletions tensorflow/lite/micro/tools/make/third_party_downloads.inc
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Expand Up @@ -20,8 +20,8 @@ LEON_BCC2_MD5 := "cdf78082be4882da2a92c9baa82fe765"
TSIM_URL := "https://www.gaisler.com/anonftp/tsim/tsim-eval-2.0.63.tar.gz"
TSIM_MD5 := "afa0095d3ed989a949e1467f94e41d2f"

CMSIS_URL := "https://github.com/ARM-software/CMSIS_5/archive/b2937134bd2047bd569c4408391ae20d7677d35c.zip"
CMSIS_MD5 := "04cb3a2cb4834284767a01e8f1c6f834"
CMSIS_URL := "https://github.com/ARM-software/CMSIS_5/archive/3d8235079ade1e4df06f91be65e0309cc45e1952.zip"
CMSIS_MD5 := "f3e93203e875caf4ba6aff0bccd95d85"

AM_SDK_URL := "http://s3.asia.ambiqmicro.com/downloads/AmbiqSuite-Rel2.2.0.zip"
AM_SDK_MD5 := "7605fa2d4d97e6bb7a1190c92b66b597"
Expand Down