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IntelSiliconPkg: Fix VS2015 NOOPT IA32 build failure in IntelVTdDxe
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There are VS2015 NOOPT IA32 build failure like below in IntelVTdDxe.
XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __allshl
XXX.lib(XXX.obj) : error LNK2001: unresolved external symbol __aullshr

This patch is to update Vtd.h to use UINT32 instead of UINT64 for
bitfields in structure definition, and also update IntelVTdDxe code
accordingly.

Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
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@lzeng14
lzeng14 committed Aug 11, 2017
1 parent 9169c6e commit 76c6f69
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Showing 6 changed files with 152 additions and 132 deletions.
225 changes: 118 additions & 107 deletions IntelSiliconPkg/Include/IndustryStandard/Vtd.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -26,9 +26,10 @@

typedef union {
struct {
UINT64 Present:1;
UINT64 Reserved_1:11;
UINT64 ContextTablePointer:52;
UINT32 Present:1;
UINT32 Reserved_1:11;
UINT32 ContextTablePointerLo:20;
UINT32 ContextTablePointerHi:32;

UINT64 Reserved_64;
} Bits;
Expand All @@ -40,13 +41,15 @@ typedef union {

typedef union {
struct {
UINT64 LowerPresent:1;
UINT64 Reserved_1:11;
UINT64 LowerContextTablePointer:52;

UINT64 UpperPresent:1;
UINT64 Reserved_65:11;
UINT64 UpperContextTablePointer:52;
UINT32 LowerPresent:1;
UINT32 Reserved_1:11;
UINT32 LowerContextTablePointerLo:20;
UINT32 LowerContextTablePointerHi:32;

UINT32 UpperPresent:1;
UINT32 Reserved_65:11;
UINT32 UpperContextTablePointerLo:20;
UINT32 UpperContextTablePointerHi:32;
} Bits;
struct {
UINT64 Uint64Lo;
Expand All @@ -56,17 +59,19 @@ typedef union {

typedef union {
struct {
UINT64 Present:1;
UINT64 FaultProcessingDisable:1;
UINT64 TranslationType:2;
UINT64 Reserved_4:8;
UINT64 SecondLevelPageTranslationPointer:52;

UINT64 AddressWidth:3;
UINT64 Ignored_67:4;
UINT64 Reserved_71:1;
UINT64 DomainIdentifier:16;
UINT64 Reserved_88:40;
UINT32 Present:1;
UINT32 FaultProcessingDisable:1;
UINT32 TranslationType:2;
UINT32 Reserved_4:8;
UINT32 SecondLevelPageTranslationPointerLo:20;
UINT32 SecondLevelPageTranslationPointerHi:32;

UINT32 AddressWidth:3;
UINT32 Ignored_67:4;
UINT32 Reserved_71:1;
UINT32 DomainIdentifier:16;
UINT32 Reserved_88:8;
UINT32 Reserved_96:32;
} Bits;
struct {
UINT64 Uint64Lo;
Expand All @@ -76,51 +81,54 @@ typedef union {

typedef union {
struct {
UINT64 Present:1;
UINT64 FaultProcessingDisable:1;
UINT64 TranslationType:3;
UINT64 ExtendedMemoryType:3;
UINT64 DeferredInvalidateEnable:1;
UINT64 PageRequestEnable:1;
UINT64 NestedTranslationEnable:1;
UINT64 PASIDEnable:1;
UINT64 SecondLevelPageTranslationPointer:52;

UINT64 AddressWidth:3;
UINT64 PageGlobalEnable:1;
UINT64 NoExecuteEnable:1;
UINT64 WriteProtectEnable:1;
UINT64 CacheDisable:1;
UINT64 ExtendedMemoryTypeEnable:1;
UINT64 DomainIdentifier:16;
UINT64 SupervisorModeExecuteProtection:1;
UINT64 ExtendedAccessedFlagEnable:1;
UINT64 ExecuteRequestsEnable:1;
UINT64 SecondLevelExecuteEnable:1;
UINT64 Reserved_92:4;
UINT64 PageAttributeTable0:3;
UINT64 Reserved_Pat0:1;
UINT64 PageAttributeTable1:3;
UINT64 Reserved_Pat1:1;
UINT64 PageAttributeTable2:3;
UINT64 Reserved_Pat2:1;
UINT64 PageAttributeTable3:3;
UINT64 Reserved_Pat3:1;
UINT64 PageAttributeTable4:3;
UINT64 Reserved_Pat4:1;
UINT64 PageAttributeTable5:3;
UINT64 Reserved_Pat5:1;
UINT64 PageAttributeTable6:3;
UINT64 Reserved_Pat6:1;
UINT64 PageAttributeTable7:3;
UINT64 Reserved_Pat7:1;

UINT64 PASIDTableSize:4;
UINT64 Reserved_132:8;
UINT64 PASIDTablePointer:52;

UINT64 Reserved_192:12;
UINT64 PASIDStateTablePointer:52;
UINT32 Present:1;
UINT32 FaultProcessingDisable:1;
UINT32 TranslationType:3;
UINT32 ExtendedMemoryType:3;
UINT32 DeferredInvalidateEnable:1;
UINT32 PageRequestEnable:1;
UINT32 NestedTranslationEnable:1;
UINT32 PASIDEnable:1;
UINT32 SecondLevelPageTranslationPointerLo:20;
UINT32 SecondLevelPageTranslationPointerHi:32;

UINT32 AddressWidth:3;
UINT32 PageGlobalEnable:1;
UINT32 NoExecuteEnable:1;
UINT32 WriteProtectEnable:1;
UINT32 CacheDisable:1;
UINT32 ExtendedMemoryTypeEnable:1;
UINT32 DomainIdentifier:16;
UINT32 SupervisorModeExecuteProtection:1;
UINT32 ExtendedAccessedFlagEnable:1;
UINT32 ExecuteRequestsEnable:1;
UINT32 SecondLevelExecuteEnable:1;
UINT32 Reserved_92:4;
UINT32 PageAttributeTable0:3;
UINT32 Reserved_Pat0:1;
UINT32 PageAttributeTable1:3;
UINT32 Reserved_Pat1:1;
UINT32 PageAttributeTable2:3;
UINT32 Reserved_Pat2:1;
UINT32 PageAttributeTable3:3;
UINT32 Reserved_Pat3:1;
UINT32 PageAttributeTable4:3;
UINT32 Reserved_Pat4:1;
UINT32 PageAttributeTable5:3;
UINT32 Reserved_Pat5:1;
UINT32 PageAttributeTable6:3;
UINT32 Reserved_Pat6:1;
UINT32 PageAttributeTable7:3;
UINT32 Reserved_Pat7:1;

UINT32 PASIDTableSize:4;
UINT32 Reserved_132:8;
UINT32 PASIDTablePointerLo:20;
UINT32 PASIDTablePointerHi:32;

UINT32 Reserved_192:12;
UINT32 PASIDStateTablePointerLo:20;
UINT32 PASIDStateTablePointerHi:32;
} Bits;
struct {
UINT64 Uint64_1;
Expand All @@ -132,63 +140,66 @@ typedef union {

typedef union {
struct {
UINT64 Present:1;
UINT64 Reserved_1:2;
UINT64 PageLevelCacheDisable:1;
UINT64 PageLevelWriteThrough:1;
UINT64 Reserved_5:6;
UINT64 SupervisorRequestsEnable:1;
UINT64 FirstLevelPageTranslationPointer:52;
UINT32 Present:1;
UINT32 Reserved_1:2;
UINT32 PageLevelCacheDisable:1;
UINT32 PageLevelWriteThrough:1;
UINT32 Reserved_5:6;
UINT32 SupervisorRequestsEnable:1;
UINT32 FirstLevelPageTranslationPointerLo:20;
UINT32 FirstLevelPageTranslationPointerHi:32;
} Bits;
UINT64 Uint64;
} VTD_PASID_ENTRY;

typedef union {
struct {
UINT64 Reserved_0:32;
UINT64 ActiveReferenceCount:16;
UINT64 Reserved_48:15;
UINT64 DeferredInvalidate:1;
UINT32 Reserved_0:32;
UINT32 ActiveReferenceCount:16;
UINT32 Reserved_48:15;
UINT32 DeferredInvalidate:1;
} Bits;
UINT64 Uint64;
} VTD_PASID_STATE_ENTRY;

typedef union {
struct {
UINT64 Present:1;
UINT64 ReadWrite:1;
UINT64 UserSupervisor:1;
UINT64 PageLevelWriteThrough:1;
UINT64 PageLevelCacheDisable:1;
UINT64 Accessed:1;
UINT64 Dirty:1;
UINT64 PageSize:1; // It is PageAttribute:1 for 4K page entry
UINT64 Global:1;
UINT64 Ignored_9:1;
UINT64 ExtendedAccessed:1;
UINT64 Ignored_11:1;
UINT32 Present:1;
UINT32 ReadWrite:1;
UINT32 UserSupervisor:1;
UINT32 PageLevelWriteThrough:1;
UINT32 PageLevelCacheDisable:1;
UINT32 Accessed:1;
UINT32 Dirty:1;
UINT32 PageSize:1; // It is PageAttribute:1 for 4K page entry
UINT32 Global:1;
UINT32 Ignored_9:1;
UINT32 ExtendedAccessed:1;
UINT32 Ignored_11:1;
// NOTE: There is PageAttribute:1 as bit12 for 1G page entry and 2M page entry
UINT64 Address:40;
UINT64 Ignored_52:11;
UINT64 ExecuteDisable:1;
UINT32 AddressLo:20;
UINT32 AddressHi:20;
UINT32 Ignored_52:11;
UINT32 ExecuteDisable:1;
} Bits;
UINT64 Uint64;
} VTD_FIRST_LEVEL_PAGING_ENTRY;

typedef union {
struct {
UINT64 Read:1;
UINT64 Write:1;
UINT64 Execute:1;
UINT64 ExtendedMemoryType:3;
UINT64 IgnorePAT:1;
UINT64 PageSize:1;
UINT64 Ignored_8:3;
UINT64 Snoop:1;
UINT64 Address:40;
UINT64 Ignored_52:10;
UINT64 TransientMapping:1;
UINT64 Ignored_63:1;
UINT32 Read:1;
UINT32 Write:1;
UINT32 Execute:1;
UINT32 ExtendedMemoryType:3;
UINT32 IgnorePAT:1;
UINT32 PageSize:1;
UINT32 Ignored_8:3;
UINT32 Snoop:1;
UINT32 AddressLo:20;
UINT32 AddressHi:20;
UINT32 Ignored_52:10;
UINT32 TransientMapping:1;
UINT32 Ignored_63:1;
} Bits;
UINT64 Uint64;
} VTD_SECOND_LEVEL_PAGING_ENTRY;
Expand Down Expand Up @@ -299,16 +310,16 @@ typedef union {
UINT32 NWFS:1; // No Write Flag Support
UINT32 EAFS:1; // Extended Accessed Flag Support
UINT32 PSS:5; // PASID Size Supported

UINT32 Rsvd_40:24;
} Bits;
UINT64 Uint64;
} VTD_ECAP_REG;

typedef union {
struct {
UINT64 Rsvd_0:12;
UINT64 FI:52; // FaultInfo
UINT32 Rsvd_0:12;
UINT32 FILo:20; // FaultInfo
UINT32 FIHi:32; // FaultInfo

UINT32 SID:16; // Source Identifier
UINT32 Rsvd_80:13;
Expand Down
2 changes: 2 additions & 0 deletions IntelSiliconPkg/IntelVTdDxe/DmaProtection.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,8 @@
#include <IndustryStandard/DmaRemappingReportingTable.h>
#include <IndustryStandard/Vtd.h>

#define VTD_64BITS_ADDRESS(Lo, Hi) (LShiftU64 (Lo, 12) | LShiftU64 (Hi, 32))

#define ALIGN_VALUE_UP(Value, Alignment) (((Value) + (Alignment) - 1) & (~((Alignment) - 1)))
#define ALIGN_VALUE_LOW(Value, Alignment) ((Value) & (~((Alignment) - 1)))

Expand Down
4 changes: 2 additions & 2 deletions IntelSiliconPkg/IntelVTdDxe/PciInfo.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -289,7 +289,7 @@ FindVtdIndexByPciDevice (

if (mVtdUnitInformation[VtdIndex].ExtRootEntryTable != 0) {
ExtRootEntry = &mVtdUnitInformation[VtdIndex].ExtRootEntryTable[SourceId.Index.RootIndex];
ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)LShiftU64 (ExtRootEntry->Bits.LowerContextTablePointer, 12) ;
ExtContextEntryTable = (VTD_EXT_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(ExtRootEntry->Bits.LowerContextTablePointerLo, ExtRootEntry->Bits.LowerContextTablePointerHi) ;
ThisExtContextEntry = &ExtContextEntryTable[SourceId.Index.ContextIndex];
if (ThisExtContextEntry->Bits.AddressWidth == 0) {
continue;
Expand All @@ -298,7 +298,7 @@ FindVtdIndexByPciDevice (
*ContextEntry = NULL;
} else {
RootEntry = &mVtdUnitInformation[VtdIndex].RootEntryTable[SourceId.Index.RootIndex];
ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)LShiftU64 (RootEntry->Bits.ContextTablePointer, 12) ;
ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(RootEntry->Bits.ContextTablePointerLo, RootEntry->Bits.ContextTablePointerHi) ;
ThisContextEntry = &ContextEntryTable[SourceId.Index.ContextIndex];
if (ThisContextEntry->Bits.AddressWidth == 0) {
continue;
Expand Down
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