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MdePkg: Remove the macro definitions regarding Opcode.
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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3790

Remove the macro definitions regarding Opcode because new version of
NASM tool(e.g. v2.15.05) supports the corresponding instructions.
Note: This patch need to be merged after other NASM code change to avoid
compilation errors.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
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jasonlouyun authored and mergify[bot] committed Mar 1, 2022
1 parent 2aa107c commit bbaa00d
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Showing 2 changed files with 2 additions and 50 deletions.
26 changes: 1 addition & 25 deletions MdePkg/Include/Ia32/Nasm.inc
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
Expand All @@ -9,30 +9,6 @@
;
;------------------------------------------------------------------------------

%macro SAVEPREVSSP 0
DB 0xF3, 0x0F, 0x01, 0xEA
%endmacro

%macro CLRSSBSY_EAX 0
DB 0x67, 0xF3, 0x0F, 0xAE, 0x30
%endmacro

%macro RSTORSSP_EAX 0
DB 0x67, 0xF3, 0x0F, 0x01, 0x28
%endmacro

%macro SETSSBSY 0
DB 0xF3, 0x0F, 0x01, 0xE8
%endmacro

%macro READSSP_EAX 0
DB 0xF3, 0x0F, 0x1E, 0xC8
%endmacro

%macro INCSSP_EAX 0
DB 0xF3, 0x0F, 0xAE, 0xE8
%endmacro

; NASM provides built-in macros STRUC and ENDSTRUC for structure definition.
; For example, to define a structure called mytype containing a longword,
; a word, a byte and a string of bytes, you might code
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26 changes: 1 addition & 25 deletions MdePkg/Include/X64/Nasm.inc
@@ -1,6 +1,6 @@
;------------------------------------------------------------------------------
;
; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
; Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Abstract:
Expand All @@ -9,30 +9,6 @@
;
;------------------------------------------------------------------------------

%macro SAVEPREVSSP 0
DB 0xF3, 0x0F, 0x01, 0xEA
%endmacro

%macro CLRSSBSY_RAX 0
DB 0xF3, 0x0F, 0xAE, 0x30
%endmacro

%macro RSTORSSP_RAX 0
DB 0xF3, 0x0F, 0x01, 0x28
%endmacro

%macro SETSSBSY 0
DB 0xF3, 0x0F, 0x01, 0xE8
%endmacro

%macro READSSP_RAX 0
DB 0xF3, 0x48, 0x0F, 0x1E, 0xC8
%endmacro

%macro INCSSP_RAX 0
DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8
%endmacro

;
; Macro for the PVALIDATE instruction, defined in AMD APM volume 3.
; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392753
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