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refactor stmf32f4xx chip code into multiple crates #1803
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bors d+
I don't have any STM hardware to test with, but this looks reasonable to me
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Can you remove the features from |
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bors d+
Same as before
bors r+ Given that no one was able to do 1.5 release testing for the nucleo boards, I don't think it makes sense to wait for someone with hardware to test on this board. |
Build succeeded: |
1800: Remaining clippy allows/fixes r=hudson-ayers a=hudson-ayers ### Pull Request Overview This pull request includes just the fixes from #1773, except those included in ~~#1794~~ #1803 or #1792 or #1796. It does not add clippy to the CI pipeline so that change can be reviewed seperately from these fixes. Once this PR and #1803 are merged, `tools/run_clippy.sh` will pass. It includes several clippy allows, with justifications included, as well as fixes requested by clippy. I had to apply the clippy fixes manually as `cargo clippy --fix` does not seem to work with our current nightly version. ### Testing Strategy This pull request was tested by Travis-CI and `run_clippy.sh`. ### TODO or Help Wanted N/A ### Documentation Updated - [ ] No updates are required. ### Formatting - [x] Ran `make formatall`. Co-authored-by: Hudson Ayers <hayers@stanford.edu> Co-authored-by: Pat Pannuto <pat.pannuto@gmail.com>
Pull Request Overview
This pull request refactors the
stm32f4xx
code into three crates. In addition to the base crate, it adds two new crates --stm32f446re
andstm32429zi
-- which contain all code specific to those chip versions. So far, that is just a few NVIC IDs and theIRQS
array.Importantly, this PR removes any need for cargo features (
#[cfg( feature = x)]
statements) for functionality which differs between these two chips. It also absolves any need forcfg_if!()
or other similar approach to enable clippy to pass on these crates, so I am closing #1794 in favor of this.Testing Strategy
This pull request was tested by travis-ci and clippy.
I do not have any nucleo boards, so I can't test this on hardware.
TODO or Help Wanted
My approach to separating out the NVIC ids was to leave the shared IDs in
stm32f4xx/src/nvic.rs
and put chip-specific IDs instm32f446re/src/stm32f446re_nvic.rs and stm32f429zi/src/stm32f429zi_nvic.rs
. We don't currently use any of the chip-specific IDs, so the usability of this approach is pretty untested -- I think we would have to turn to something similar to theinterrupt_service
trait used by thenrf52
family of chips.Documentation Updated
stm32f4xx
, and didn't see any other documentation that needs updating, but could have missed something.Formatting
make formatall
.