riscv mtimer: don't directly modify interrupt enables

[hudson-ayers]

Pull Request Overview

This pull request removes all direct manipulations of the risc-v mtimer interrupt enable that do not occur from within the top level interrupt handler or a board main file. This is to bring RISC-V chips in line with the current Tock interrupt architecture, so that any discussion of allowing peripherals to directly enable/disable interrupts can wait until after the 1.6 release.

Why I think these removals do not affect correctness of the code:

• SchedulerTimer::arm() and SchedulerTimer::disarm() are optional optimizations

• set_alarm() uses the approach recommended in the RISC-V ISA to avoid triggering alarms while setting them, so disabling interrupts while setting the alarm should no longer be required. Enabling interrupts at the end of set_alarm() is not required, because with this change timer interrupts should never be disabled.

With this change, #2116 can safely be merged as-is.

Testing Strategy

This pull request was tested by compiling.

TODO or Help Wanted

N/A

Documentation Updated

• No updates are required.

Formatting

• Ran make prepush.

[phil-levis]

bors r+

[bors]

Build succeeded:

• ci-build (macos-latest)
• ci-build (ubuntu-latest)
• ci-format (macos-latest)
• ci-format (ubuntu-latest)
• ci-qemu
• ci-tests (macos-latest)
• ci-tests (ubuntu-latest)