Move some cortex-m specific code to arch/

arch/cortex-m/Cargo.toml

@@ -0,0 +1,4 @@
+[package]
+name = "cortexm"
+version = "0.1.0"
+authors = ["Tock Project Developers <tock-dev@googlegroups.com>"]

arch/cortex-m/src/lib.rs

@@ -0,0 +1,8 @@
+//! Generic support for all Cortex-M platforms.
+
+#![crate_name = "cortexm"]
+#![crate_type = "rlib"]
+#![feature(asm, const_fn, naked_functions, lang_items)]
+#![no_std]
+
+pub mod support;

arch/cortex-m0/Cargo.toml

@@ -5,3 +5,4 @@ authors = ["Tock Project Developers <tock-dev@googlegroups.com>"]
 
 [dependencies]
 kernel = { path = "../../kernel" }
+cortexm = { path = "../cortex-m" }

arch/cortex-m0/src/lib.rs

@@ -1,10 +1,15 @@
 #![feature(asm, const_fn, naked_functions)]
 #![no_std]
 
+extern crate cortexm;
 extern crate kernel;
 
 pub mod nvic;
 
+pub mod support {
+    pub use cortexm::support::*;
+}
+
 #[cfg(not(target_os = "none"))]
 pub unsafe extern "C" fn generic_isr() {}
 

arch/cortex-m3/Cargo.toml

@@ -5,3 +5,4 @@ authors = ["Tock Project Developers <tock-dev@googlegroups.com>"]
 
 [dependencies]
 kernel = { path = "../../kernel" }
+cortexm = { path = "../cortex-m" }

arch/cortex-m3/src/lib.rs

@@ -3,12 +3,17 @@
 
 #[allow(unused_imports)]
 #[macro_use(debug, debug_gpio, register_bitfields, register_bitmasks)]
+extern crate cortexm;
 extern crate kernel;
 
 pub mod nvic;
 pub mod scb;
 pub mod systick;
 
+pub mod support {
+    pub use cortexm::support::*;
+}
+
 #[no_mangle]
 #[naked]
 pub unsafe extern "C" fn systick_handler() {

arch/cortex-m4/Cargo.toml

@@ -5,3 +5,4 @@ authors = ["Tock Project Developers <tock-dev@googlegroups.com>"]
 
 [dependencies]
 kernel = { path = "../../kernel" }
+cortexm = { path = "../cortex-m" }

arch/cortex-m4/src/lib.rs

@@ -8,12 +8,19 @@
 #[allow(unused_imports)]
 #[macro_use(debug, debug_gpio, register_bitfields, register_bitmasks)]
 extern crate kernel;
+extern crate cortexm;
 
 pub mod mpu;
 pub mod nvic;
 pub mod scb;
 pub mod systick;
 
+// Re-export the base generic cortex-m functions here as they are
+// valid on cortex-m4.
+pub mod support {
+    pub use cortexm::support::*;
+}
+
 #[cfg(not(target_os = "none"))]
 pub unsafe extern "C" fn systick_handler() {}
 
@@ -171,3 +178,25 @@ pub unsafe extern "C" fn switch_to_user(
     : "r4","r5","r6","r7","r8","r9","r10","r11");
     user_stack as *mut u8
 }
+
+// Table 2.5
+// http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0553a/CHDBIBGJ.html
+pub fn ipsr_isr_number_to_str(isr_number: usize) -> &'static str {
+    match isr_number {
+        0 => "Thread Mode",
+        1 => "Reserved",
+        2 => "NMI",
+        3 => "HardFault",
+        4 => "MemManage",
+        5 => "BusFault",
+        6 => "UsageFault",
+        7...10 => "Reserved",
+        11 => "SVCall",
+        12 => "Reserved for Debug",
+        13 => "Reserved",
+        14 => "PendSV",
+        15 => "SysTick",
+        16...255 => "IRQn",
+        _ => "(Unknown! Illegal value?)",
+    }
+}

boards/hail/src/main.rs

@@ -12,6 +12,7 @@ extern crate capsules;
 #[allow(unused_imports)]
 #[macro_use(debug, debug_gpio, static_init)]
 extern crate kernel;
+extern crate cortexm4;
 extern crate sam4l;
 
 use capsules::virtual_alarm::{MuxAlarm, VirtualMuxAlarm};
@@ -466,7 +467,7 @@ pub unsafe fn reset_handler() {
     sam4l::gpio::PA[17].clear();
     // minimum hold time is 200ns, ~20ns per instruction, so overshoot a bit
     for _ in 0..10 {
-        kernel::support::nop();
+        cortexm4::support::nop();
     }
     sam4l::gpio::PA[17].set();
 

boards/imix/src/main.rs

@@ -12,6 +12,7 @@ extern crate capsules;
 #[allow(unused_imports)]
 #[macro_use(debug, debug_gpio, static_init)]
 extern crate kernel;
+extern crate cortexm4;
 extern crate sam4l;
 
 use capsules::alarm::AlarmDriver;
@@ -627,7 +628,7 @@ pub unsafe fn reset_handler() {
     sam4l::gpio::PB[07].clear();
     // minimum hold time is 200ns, ~20ns per instruction, so overshoot a bit
     for _ in 0..10 {
-        kernel::support::nop();
+        cortexm4::support::nop();
     }
     sam4l::gpio::PB[07].set();
 

chips/cc26x2/src/chip.rs

@@ -6,7 +6,6 @@ use cc26xx::rtc;
 use cc26xx::uart;
 use cortexm4::{self, nvic};
 use kernel;
-use kernel::support;
 
 pub struct Cc26X2 {
     mpu: cortexm4::mpu::MPU,
@@ -60,7 +59,14 @@ impl kernel::Chip for Cc26X2 {
 
     fn sleep(&self) {
         unsafe {
-            support::wfi();
+            cortexm4::support::wfi();
         }
     }
+
+    unsafe fn atomic<F, R>(&self, f: F) -> R
+    where
+        F: FnOnce() -> R,
+    {
+        cortexm4::support::atomic(f)
+    }
 }

chips/nrf51/src/chip.rs

@@ -1,7 +1,7 @@
+use cortexm0;
 use cortexm0::nvic;
 use i2c;
 use kernel;
-use kernel::support;
 use nrf5x;
 use nrf5x::peripheral_interrupts::*;
 use radio;
@@ -88,7 +88,14 @@ impl kernel::Chip for NRF51 {
 
     fn sleep(&self) {
         unsafe {
-            support::wfi();
+            cortexm0::support::wfi();
         }
     }
+
+    unsafe fn atomic<F, R>(&self, f: F) -> R
+    where
+        F: FnOnce() -> R,
+    {
+        cortexm0::support::atomic(f)
+    }
 }