vlsi-physical-design
Here are 12 public repositories matching this topic...
Deep learning toolkit-enabled VLSI placement
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Jun 26, 2024 - C++
Design rule checker for VLSI layouts
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Jun 21, 2024 - C++
Standard cell placement (global and detailed) tool based on modified algorithm “simulated annealing”
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Apr 30, 2024 - C++
Dr. CU, VLSI Detailed Routing Tool Developed by CUHK
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Mar 20, 2023 - C++
Coursework of NTHU CS613500 VLSI Physical Design Automation
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Feb 22, 2023 - C++
A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
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Aug 7, 2022 - C++
A customized placer based on the RePlAce global placement tool.
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Jul 18, 2021 - C++
Courseworks of CS6165 VLSI Physical Design Automation, NTHU.
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Jan 23, 2021 - C++
Steiner Shallow-Light Tree for VLSI Routing
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Jan 2, 2020 - C++
A SAT-Based cell router.
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Nov 27, 2018 - C++
VLSI EDA Global Router
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Jan 22, 2018 - C++
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