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Merge tag 'for-linus' of git://linux-c6x.org/git/projects/linux-c6x-u…
…pstreaming Pull C6X changes from Mark Salter: - remove use of legacy irqs which really wasn't needed - add support for C66x SoC on EVMC6678 board - clean up compiler warning * tag 'for-linus' of git://linux-c6x.org/git/projects/linux-c6x-upstreaming: C6X: clean up compiler warning C6X: add basic support for TMS320C6678 SoC C6X: remove dependence on legacy IRQs C6X: remove megamod-pic requirement on direct-mapped core pic
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/* | ||
* arch/c6x/boot/dts/evmc6678.dts | ||
* | ||
* EVMC6678 Evaluation Platform For TMS320C6678 | ||
* | ||
* Copyright (C) 2012 Texas Instruments Incorporated | ||
* | ||
* Author: Ken Cox <jkc@redhat.com> | ||
* | ||
* This program is free software; you can redistribute it and/or | ||
* modify it under the terms of the GNU General Public License | ||
* as published by the Free Software Foundation; either version 2 | ||
* of the License, or (at your option) any later version. | ||
* | ||
*/ | ||
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/dts-v1/; | ||
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/include/ "tms320c6678.dtsi" | ||
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/ { | ||
model = "Advantech EVMC6678"; | ||
compatible = "advantech,evmc6678"; | ||
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chosen { | ||
bootargs = "root=/dev/nfs ip=dhcp rw"; | ||
}; | ||
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memory { | ||
device_type = "memory"; | ||
reg = <0x80000000 0x20000000>; | ||
}; | ||
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soc { | ||
megamod_pic: interrupt-controller@1800000 { | ||
interrupts = < 12 13 14 15 >; | ||
}; | ||
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timer8: timer@2280000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 66 >; | ||
}; | ||
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timer9: timer@2290000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 68 >; | ||
}; | ||
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timer10: timer@22A0000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 70 >; | ||
}; | ||
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timer11: timer@22B0000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 72 >; | ||
}; | ||
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timer12: timer@22C0000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 74 >; | ||
}; | ||
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timer13: timer@22D0000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 76 >; | ||
}; | ||
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timer14: timer@22E0000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 78 >; | ||
}; | ||
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timer15: timer@22F0000 { | ||
interrupt-parent = <&megamod_pic>; | ||
interrupts = < 80 >; | ||
}; | ||
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clock-controller@2310000 { | ||
clock-frequency = <100000000>; | ||
}; | ||
}; | ||
}; |
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/ { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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cpus { | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
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cpu@0 { | ||
device_type = "cpu"; | ||
reg = <0>; | ||
model = "ti,c66x"; | ||
}; | ||
cpu@1 { | ||
device_type = "cpu"; | ||
reg = <1>; | ||
model = "ti,c66x"; | ||
}; | ||
cpu@2 { | ||
device_type = "cpu"; | ||
reg = <2>; | ||
model = "ti,c66x"; | ||
}; | ||
cpu@3 { | ||
device_type = "cpu"; | ||
reg = <3>; | ||
model = "ti,c66x"; | ||
}; | ||
cpu@4 { | ||
device_type = "cpu"; | ||
reg = <4>; | ||
model = "ti,c66x"; | ||
}; | ||
cpu@5 { | ||
device_type = "cpu"; | ||
reg = <5>; | ||
model = "ti,c66x"; | ||
}; | ||
cpu@6 { | ||
device_type = "cpu"; | ||
reg = <6>; | ||
model = "ti,c66x"; | ||
}; | ||
cpu@7 { | ||
device_type = "cpu"; | ||
reg = <7>; | ||
model = "ti,c66x"; | ||
}; | ||
}; | ||
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soc { | ||
compatible = "simple-bus"; | ||
model = "tms320c6678"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
ranges; | ||
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core_pic: interrupt-controller { | ||
compatible = "ti,c64x+core-pic"; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
}; | ||
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megamod_pic: interrupt-controller@1800000 { | ||
compatible = "ti,c64x+megamod-pic"; | ||
interrupt-controller; | ||
#interrupt-cells = <1>; | ||
reg = <0x1800000 0x1000>; | ||
interrupt-parent = <&core_pic>; | ||
}; | ||
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cache-controller@1840000 { | ||
compatible = "ti,c64x+cache"; | ||
reg = <0x01840000 0x8400>; | ||
}; | ||
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timer8: timer@2280000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x01 >; | ||
reg = <0x2280000 0x40>; | ||
}; | ||
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timer9: timer@2290000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x02 >; | ||
reg = <0x2290000 0x40>; | ||
}; | ||
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timer10: timer@22A0000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x04 >; | ||
reg = <0x22A0000 0x40>; | ||
}; | ||
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timer11: timer@22B0000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x08 >; | ||
reg = <0x22B0000 0x40>; | ||
}; | ||
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timer12: timer@22C0000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x10 >; | ||
reg = <0x22C0000 0x40>; | ||
}; | ||
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timer13: timer@22D0000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x20 >; | ||
reg = <0x22D0000 0x40>; | ||
}; | ||
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timer14: timer@22E0000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x40 >; | ||
reg = <0x22E0000 0x40>; | ||
}; | ||
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timer15: timer@22F0000 { | ||
compatible = "ti,c64x+timer64"; | ||
ti,core-mask = < 0x80 >; | ||
reg = <0x22F0000 0x40>; | ||
}; | ||
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clock-controller@2310000 { | ||
compatible = "ti,c6678-pll", "ti,c64x+pll"; | ||
reg = <0x02310000 0x200>; | ||
ti,c64x+pll-bypass-delay = <200>; | ||
ti,c64x+pll-reset-delay = <12000>; | ||
ti,c64x+pll-lock-delay = <80000>; | ||
}; | ||
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device-state-controller@2620000 { | ||
compatible = "ti,c64x+dscr"; | ||
reg = <0x02620000 0x1000>; | ||
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ti,dscr-devstat = <0x20>; | ||
ti,dscr-silicon-rev = <0x18 28 0xf>; | ||
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ti,dscr-mac-fuse-regs = <0x110 1 2 3 4 | ||
0x114 5 6 0 0>; | ||
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}; | ||
}; | ||
}; |
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CONFIG_SOC_TMS320C6678=y | ||
CONFIG_EXPERIMENTAL=y | ||
# CONFIG_LOCALVERSION_AUTO is not set | ||
CONFIG_SYSVIPC=y | ||
CONFIG_SPARSE_IRQ=y | ||
CONFIG_LOG_BUF_SHIFT=14 | ||
CONFIG_NAMESPACES=y | ||
# CONFIG_UTS_NS is not set | ||
# CONFIG_USER_NS is not set | ||
# CONFIG_PID_NS is not set | ||
CONFIG_BLK_DEV_INITRD=y | ||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
CONFIG_EXPERT=y | ||
# CONFIG_FUTEX is not set | ||
# CONFIG_SLUB_DEBUG is not set | ||
CONFIG_MODULES=y | ||
CONFIG_MODULE_FORCE_LOAD=y | ||
CONFIG_MODULE_UNLOAD=y | ||
CONFIG_MODULE_FORCE_UNLOAD=y | ||
CONFIG_CMDLINE_BOOL=y | ||
CONFIG_CMDLINE="" | ||
# CONFIG_CMDLINE_FORCE is not set | ||
CONFIG_BOARD_EVM6678=y | ||
CONFIG_NO_HZ=y | ||
CONFIG_HIGH_RES_TIMERS=y | ||
CONFIG_BLK_DEV_LOOP=y | ||
CONFIG_BLK_DEV_RAM=y | ||
CONFIG_BLK_DEV_RAM_COUNT=2 | ||
CONFIG_BLK_DEV_RAM_SIZE=17000 | ||
CONFIG_MISC_DEVICES=y | ||
# CONFIG_INPUT is not set | ||
# CONFIG_SERIO is not set | ||
# CONFIG_VT is not set | ||
# CONFIG_HW_RANDOM is not set | ||
# CONFIG_HWMON is not set | ||
# CONFIG_USB_SUPPORT is not set | ||
# CONFIG_IOMMU_SUPPORT is not set | ||
# CONFIG_MISC_FILESYSTEMS is not set | ||
CONFIG_CRC16=y | ||
# CONFIG_ENABLE_MUST_CHECK is not set | ||
# CONFIG_SCHED_DEBUG is not set | ||
# CONFIG_DEBUG_BUGVERBOSE is not set |
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