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An RS232 communication controller implemented in VHDL
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vhdl Commit of 2008 code Aug 17, 2014


This repository contains a VHDL implementation of an RS232 communication controller.

It was developed in 2008 and used in various projects on two FPGA boards: the Xilinx Spartan-3E Starter Kit and the XUP Virtex-II Pro board.

All pin specifications in uart_test.ucf are for the Spartan-3E board.

Default communication settings

115200 bps transfer rate, 8 data bits, no parity

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