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Error facing while compiling the Tiny Rocket Core #1579
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This is a very old Chipyard (1.5.0), and our ability to support it is limited. Can you try again with the most recent version? |
@jerryz123 |
Did you add ZCU102 support to your own branch? I don't believe the upstream has that board supported. |
@jerryz123 But in Tiny core even the default configuration is not working . Here I am giving make |
It is difficult for others to help you without being able to see what you implemented. |
But if this would be the case, then my different configuration is working ? Not only this I changed configuration from big core to Medium core , thats also working. I found somewhere that Rocket TinyCore uses a default scratchpad instead of a backing memory. This scratchpad 0x80000000 to 0x80003fff is overlapping with the memport's address range and I have remove the backing memory and L2 cache as well. like
But still not able to figure out what is the issue. |
I have run into similar issue when building for Arty FPGA designs. I think TinyCore requires a vastly different configuration for the memory system compared to other Core Configs. If the resource is limited, could you try use the SmallCore? class XXXConfig extends Config(
...
new freechips.rocketchip.subsystem.WithNSmallCores(1)
...
) It's still larger than TinyCore, but it shares the same system configuration as Medium and Big. Hope this is helpful. |
Hello,I have a Xilinx ZCU102 and want to run the Rocket Core on it ,but don't know how to support it,can you tell me how you did it? Thank you. |
Background Work
Current Behavior
I am trying to run the Tiny Rocket Core in Xilinx zcu102 FPGA. I tried with Default Rocket Core and it is working fine.
Is this Tiny Core required additional changes in the Scala Files.
Expected Behavior
I am using this configuration for Tiny Rocket Core.
Error I am getting
Other Information
No response
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