Scala 3.3 Bump (#30)

* some initial fixups * scalafmt + ci scala version bump * small fix * fix a few more deprecations, but thats it
ucb-bar · Jan 30, 2024 · 0a22c0b · 0a22c0b
1 parent 6f14ed8
commit 0a22c0b
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diff --git a/.github/workflows/test.yml b/.github/workflows/test.yml
@@ -17,7 +17,7 @@ jobs:
     runs-on: ubuntu-latest
     strategy:
       matrix:
-        scala: ["2.13.10", "3.2.2"]
+        scala: ["2.13.12", "3.3.1"]
 
     steps:
       - name: Checkout

diff --git a/build.sbt b/build.sbt
@@ -4,8 +4,8 @@ enablePlugins(SiteScaladocPlugin)
 
 lazy val commonSettings = Seq(
   organization := "edu.berkeley.cs",
-  scalaVersion := "3.2.2",
-  crossScalaVersions := Seq("2.13.10", "3.2.2")
+  scalaVersion := "3.3.1",
+  crossScalaVersions := Seq("2.13.12", "3.3.1")
 )
 
 lazy val firrtlSettings = Seq(
@@ -24,7 +24,7 @@ lazy val firrtlSettings = Seq(
     "org.scalatest" %% "scalatest" % "3.2.14" % "test",
     "org.scalatestplus" %% "scalacheck-1-15" % "3.2.11.0" % "test",
     "com.github.scopt" %% "scopt" % "4.1.0",
-    "org.json4s" %% "json4s-native" % "4.0.6",
+    "org.json4s" %% "json4s-native" % "4.1.0-M4",
     "org.apache.commons" % "commons-text" % "1.10.0",
     "com.lihaoyi" %% "os-lib" % "0.8.1",
     "org.scala-lang.modules" %% "scala-parallel-collections" % "1.0.4"

diff --git a/project/build.properties b/project/build.properties
@@ -1 +1 @@
-sbt.version=1.8.2
+sbt.version=1.9.8
diff --git a/src/main/scala/firrtl2/AddDescriptionNodes.scala b/src/main/scala/firrtl2/AddDescriptionNodes.scala
@@ -245,9 +245,11 @@ class AddDescriptionNodes extends Transform {
     // map field 1 (module name) -> field 2 (a list of Descriptions)
     val modMap = modList
       .groupBy(_._1)
+      .view
       .mapValues(_.map(_._2))
       // and then merge like descriptions (e.g. multiple docstrings into one big docstring)
       .mapValues(mergeDescriptions)
+      .toMap
 
     val compList = annos.collect {
       case DocStringAnnotation(ReferenceTarget(_, m, _, c, _), desc) =>
@@ -259,9 +261,10 @@ class AddDescriptionNodes extends Transform {
     // map field 1 (name) -> a map that we build
     val compMap = compList
       .groupBy(_._1)
+      .view
       .mapValues(
         // map field 2 (component name) -> field 3 (a list of Descriptions)
-        _.groupBy(_._2)
+        _.groupBy(_._2).view
           .mapValues(_.map(_._3))
           // and then merge like descriptions (e.g. multiple docstrings into one big docstring)
           .mapValues(mergeDescriptions)

diff --git a/src/main/scala/firrtl2/Compiler.scala b/src/main/scala/firrtl2/Compiler.scala
@@ -145,10 +145,10 @@ trait Transform extends TransformLike[CircuitState] with DependencyAPI[Transform
 
   def transform(state: CircuitState): CircuitState = execute(state)
 
-  private lazy val fullCompilerSet = new mutable.LinkedHashSet[Dependency[Transform]] ++ Forms.VerilogOptimized
+  private lazy val fullCompilerSet: Set[Dependency[Transform]] = Set(Forms.VerilogOptimized: _*)
 
-  private lazy val highOutputInvalidates = fullCompilerSet -- Forms.MinimalHighForm
-  private lazy val midOutputInvalidates = fullCompilerSet -- Forms.MidForm
+  private lazy val highOutputInvalidates = fullCompilerSet.removedAll(Forms.MinimalHighForm)
+  private lazy val midOutputInvalidates = fullCompilerSet.removedAll(Forms.MidForm)
 
   /** Executes before any transform's execute method
     * @param state
@@ -192,7 +192,7 @@ abstract class SeqTransform extends Transform with SeqTransformBased {
 trait ResolvedAnnotationPaths {
   this: Transform =>
 
-  val annotationClasses: Traversable[Class[_]]
+  val annotationClasses: Iterable[Class[_]]
 
   override def prepare(state: CircuitState): CircuitState = {
     state.resolvePathsOf(annotationClasses.toSeq: _*)

diff --git a/src/main/scala/firrtl2/Parser.scala b/src/main/scala/firrtl2/Parser.scala
@@ -10,6 +10,7 @@ import firrtl2.Utils.time
 import firrtl2.antlr._
 import firrtl2.logger.LazyLogging
 
+import scala.collection.immutable.ArraySeq
 import scala.util.control.NonFatal
 
 class ParserException(message: String) extends FirrtlUserException(message)
@@ -119,7 +120,7 @@ object Parser extends LazyLogging {
 
   def parse(lines: Seq[String], infoMode: InfoMode): Circuit = parse(lines.iterator, infoMode)
 
-  def parse(text: String, infoMode: InfoMode): Circuit = parse(text.split("\n"), infoMode)
+  def parse(text: String, infoMode: InfoMode): Circuit = parse(ArraySeq.unsafeWrapArray(text.split("\n")), infoMode)
 
   /** Parse the concrete syntax of a FIRRTL [[firrtl2.ir.Expression]], e.g.
     *   "add(x, y)" becomes:

diff --git a/src/main/scala/firrtl2/RenameMap.scala b/src/main/scala/firrtl2/RenameMap.scala
@@ -45,7 +45,7 @@ object RenameMap {
     val instOf: String => Map[String, String] =
       graph.getChildInstances.toMap
         // Laziness here is desirable, we only access each key once, some we don't access
-        .mapValues(_.map(k => k.name -> k.module).toMap)
+        .view.mapValues(_.map(k => k.name -> k.module).toMap)
     for ((OfModule(module), instMapping) <- renames) {
       val modLookup = instOf(module)
       val parentInstances = graph.findInstancesInHierarchy(module)

diff --git a/src/main/scala/firrtl2/Visitor.scala b/src/main/scala/firrtl2/Visitor.scala
@@ -4,7 +4,7 @@ package firrtl2
 
 import org.antlr.v4.runtime.ParserRuleContext
 import org.antlr.v4.runtime.tree.{AbstractParseTreeVisitor, ParseTreeVisitor, TerminalNode}
-import scala.collection.JavaConverters._
+import scala.jdk.CollectionConverters._
 import scala.collection.mutable
 import scala.annotation.tailrec
 import firrtl2.antlr._

diff --git a/src/main/scala/firrtl2/analyses/ConnectionGraph.scala b/src/main/scala/firrtl2/analyses/ConnectionGraph.scala
@@ -243,7 +243,7 @@ class ConnectionGraph protected (val circuit: Circuit, val digraph: DiGraph[Refe
                 instancePort.component.tail
               )
               val destinations = bfsShortCuts.getOrElse(modulePort, mutable.HashSet.empty[ReferenceTarget])
-              bfsShortCuts(modulePort) = destinations + localSource
+              bfsShortCuts(modulePort) = destinations.union(Set(localSource))
               // Remove entrance from parent from stack
               portConnectivityStack(localSink) = currentStack.tail
             } else {
@@ -572,7 +572,7 @@ object ConnectionGraph {
       expr
     }
 
-    new ConnectionGraph(circuit, DiGraph(mdg), new IRLookup(declarations.mapValues(_.toMap).toMap, moduleMap))
+    new ConnectionGraph(circuit, DiGraph(mdg), new IRLookup(declarations.view.mapValues(_.toMap).toMap, moduleMap))
   }
 }
 

diff --git a/src/main/scala/firrtl2/analyses/NodeCount.scala b/src/main/scala/firrtl2/analyses/NodeCount.scala
@@ -5,7 +5,7 @@ package analyses
 
 import ir._
 import scala.annotation.tailrec
-import scala.collection.JavaConverters._
+import scala.jdk.CollectionConverters._
 
 /** This is not intended to be used as a metric for the size of an actual
   *   circuit, but rather to debug the compiler itself

diff --git a/src/main/scala/firrtl2/annotations/Annotation.scala b/src/main/scala/firrtl2/annotations/Annotation.scala
@@ -26,11 +26,11 @@ trait Annotation extends Product {
     * @param ls
     * @return
     */
-  private def extractComponents(ls: Traversable[_]): Traversable[Target] = {
+  private def extractComponents(ls: Iterable[_]): Iterable[Target] = {
     ls.flatMap {
-      case c: Target                          => Seq(c)
-      case x: scala.collection.Traversable[_] => extractComponents(x)
-      case o: Product                         => extractComponents(o.productIterator.toIterable)
+      case c: Target                       => Seq(c)
+      case x: scala.collection.Iterable[_] => extractComponents(x)
+      case o: Product                      => extractComponents(o.productIterator.iterator.to(Iterable))
       case _ => Seq()
     }
   }
@@ -39,7 +39,7 @@ trait Annotation extends Product {
     *
     * @return
     */
-  def getTargets: Seq[Target] = extractComponents(productIterator.toIterable).toSeq
+  def getTargets: Seq[Target] = extractComponents(productIterator.iterator.to(Iterable)).toSeq
 
   /** Returns a deduplicable representation of this [[Annotation]]: a 3-tuple of the
     * deduplicated annotation's "dedup key", the deduplicated [[Annotation]], and the

diff --git a/src/main/scala/firrtl2/backends/experimental/rtlil/RtlilEmitter.scala b/src/main/scala/firrtl2/backends/experimental/rtlil/RtlilEmitter.scala
@@ -278,7 +278,7 @@ private[firrtl2] class RtlilEmitter extends SeqTransform with Emitter {
       }
 
       // dirs are already padded
-      (dirs, padToMax(tpes), m.ports).zipped.toSeq.zipWithIndex.foreach {
+      dirs.lazyZip(padToMax(tpes)).lazyZip(m.ports).toSeq.zipWithIndex.foreach {
         case ((dir, tpe, Port(info, name, _, _)), i) =>
           portDescriptions.get(name).map { d =>
             portdefs += Seq("")

diff --git a/src/main/scala/firrtl2/backends/experimental/smt/SMTTransitionSystemEncoder.scala b/src/main/scala/firrtl2/backends/experimental/smt/SMTTransitionSystemEncoder.scala
@@ -22,7 +22,7 @@ object SMTTransitionSystemEncoder {
 
     // emit header as comments
     if (sys.header.nonEmpty) {
-      cmds ++= sys.header.split('\n').map(Comment)
+      cmds ++= sys.header.split('\n').map((s: String) => Comment(s))
     }
 
     // declare state type
@@ -118,7 +118,7 @@ object SMTTransitionSystemEncoder {
       case BVSymbol(name, width) => Comment(s"firrtl-smt2-$kind $name $width")
       case ArraySymbol(name, indexWidth, dataWidth) =>
         Comment(s"firrtl-smt2-$kind $name $indexWidth $dataWidth")
-    }) ++ comments(sym.name).map(Comment)
+    }) ++ comments(sym.name).map((s: String) => Comment(s))
   }
   // All signals are modelled with functions that need to be called with the state as argument,
   // this replaces all Symbols with function applications to the state.

diff --git a/src/main/scala/firrtl2/backends/verilog/VerilogEmitter.scala b/src/main/scala/firrtl2/backends/verilog/VerilogEmitter.scala
@@ -980,7 +980,7 @@ class VerilogEmitter extends SeqTransform with Emitter {
       }
 
       // dirs are already padded
-      (dirs, padToMax(tpes), m.ports).zipped.toSeq.zipWithIndex.foreach {
+      dirs.lazyZip(padToMax(tpes)).lazyZip(m.ports).toSeq.zipWithIndex.foreach {
         case ((dir, tpe, Port(info, name, _, _)), i) =>
           portDescriptions.get(name).map {
             case d =>

diff --git a/src/main/scala/firrtl2/graph/DiGraph.scala b/src/main/scala/firrtl2/graph/DiGraph.scala
@@ -372,7 +372,7 @@ class DiGraph[T](private[graph] val edges: LinkedHashMap[T, LinkedHashSet[T]]) {
     */
   def simplify(vprime: Set[T]): DiGraph[T] = {
     require(vprime.subsetOf(edges.keySet))
-    val pathEdges = vprime.map(v => (v, reachableFrom(v) & (vprime - v)))
+    val pathEdges = vprime.map(v => (v, reachableFrom(v) & vprime.diff(Set(v))))
     new DiGraph(new LinkedHashMap[T, LinkedHashSet[T]] ++ pathEdges)
   }
 

diff --git a/src/main/scala/firrtl2/graph/EulerTour.scala b/src/main/scala/firrtl2/graph/EulerTour.scala
@@ -112,7 +112,7 @@ class EulerTour[T](r: Map[T, Int], e: Seq[T], h: Seq[Int]) {
     }
     tmp
   }
-  private lazy val st = constructSparseTable(a)
+  private lazy val st = constructSparseTable(a.toIndexedSeq)
 
   /** Precompute all possible RMQs for an array of size `n where each
     * entry in the range is different from the last by only +-1
@@ -165,7 +165,7 @@ class EulerTour[T](r: Map[T, Int], e: Seq[T], h: Seq[Int]) {
     val out = blocks.map(mapBlockToTable(_)).toArray
     out
   }
-  private lazy val tableIdx = mapBlocksToTables(blocks)
+  private lazy val tableIdx = mapBlocksToTables(blocks.toIndexedSeq)
 
   /** Range Minimum Query using the Berkman--Vishkin algorithm with the
     * simplifications of Bender--Farach-Colton.

diff --git a/src/main/scala/firrtl2/ir/IR.scala b/src/main/scala/firrtl2/ir/IR.scala
@@ -8,7 +8,7 @@ import firrtl2.backends.experimental.smt.random.DefRandom
 import firrtl2.constraint.{Constraint, IsKnown, IsVar}
 import org.apache.commons.text.translate.{AggregateTranslator, JavaUnicodeEscaper, LookupTranslator}
 
-import scala.collection.JavaConverters._
+import scala.jdk.CollectionConverters._
 import scala.math.BigDecimal.RoundingMode._
 
 /** Intermediate Representation */
@@ -175,7 +175,7 @@ object MultiInfo {
       var columnsList = columns.mkString(",")
       // Wrap the columns in curly braces if it contains more than one entry
       if (columns.size > 1)
-        columnsList = '{' + columnsList + '}'
+        columnsList = s"{$columnsList}"
 
       // If there already exists line/column numbers in the buffer, delimit the new
       // info with a space

diff --git a/src/main/scala/firrtl2/options/DependencyManager.scala b/src/main/scala/firrtl2/options/DependencyManager.scala
@@ -102,7 +102,7 @@ trait DependencyManager[A, B <: TransformLike[A] with DependencyAPI[B]] extends
           edges(obj) = LinkedHashSet.empty
           dependencyToObject += (v -> obj)
         }
-        edges(dependencyToObject(u)) = edges(dependencyToObject(u)) + dependencyToObject(v)
+        edges(dependencyToObject(u)) = edges(dependencyToObject(u)).union(Set(dependencyToObject(v)))
       }
     }
 
@@ -215,7 +215,7 @@ trait DependencyManager[A, B <: TransformLike[A] with DependencyAPI[B]] extends
         val cmp =
           (l: B, r: B) =>
             v.foldLeft((Map.empty[B, Dependency[B] => Boolean], Set.empty[Dependency[B]])) {
-              case ((m, s), r) => (m + (r -> ((a: Dependency[B]) => !s(a))), s + r)
+              case ((m, s), r) => (m + (r -> ((a: Dependency[B]) => !s(a))), s.union(Set(r)))
             }._1(l)(r)
         new LinkedHashMap() ++
           v.map(vv => vv -> (new LinkedHashSet() ++ (dependencyGraph.getEdges(vv).toSeq.sortWith(cmp))))

diff --git a/src/main/scala/firrtl2/passes/InferWidths.scala b/src/main/scala/firrtl2/passes/InferWidths.scala
@@ -98,9 +98,9 @@ class InferWidths extends Transform with ResolvedAnnotationPaths {
           }
       }
     case (t1: VectorType, t2: VectorType) => addTypeConstraints(r1.index(0), r2.index(0))(t1.tpe, t2.tpe)
-    case (AsyncResetType, AsyncResetType) => Nil
-    case (ResetType, _)                   => Nil
-    case (_, ResetType)                   => Nil
+    case (AsyncResetType, AsyncResetType) =>
+    case (ResetType, _)                   =>
+    case (_, ResetType)                   =>
     case _                                => throwInternalError("Shouldn't be here")
   }
 

diff --git a/src/main/scala/firrtl2/passes/Inline.scala b/src/main/scala/firrtl2/passes/Inline.scala
@@ -244,7 +244,7 @@ class InlineInstances extends Transform with RegisteredTransform {
       *  The [[RenameMap]]s in renamesMap are appear in renamesSeq
       *  in the order that they should be applied
       */
-    val (renamesMap, renamesSeq) = {
+    val (renamesMap: Map[(OfModule, Instance), MutableRenameMap], renamesSeq) = {
       val mutableDiGraph = new MutableDiGraph[(OfModule, Instance)]
       // compute instance graph
       instMaps.foreach {
@@ -281,8 +281,8 @@ class InlineInstances extends Transform with RegisteredTransform {
         case a =>
           val maxIdx = indexMap.values.max
           val resultSeq = Seq.fill(maxIdx + 1)(MutableRenameMap())
-          val resultMap = indexMap.mapValues(idx => resultSeq(maxIdx - idx))
-          (resultMap, resultSeq)
+          val resultMap = indexMap.view.mapValues(idx => resultSeq(maxIdx - idx))
+          (resultMap.toMap, resultSeq)
       }
     }
 
@@ -294,7 +294,7 @@ class InlineInstances extends Transform with RegisteredTransform {
       e match {
         case wsf @ WSubField(wr @ WRef(ref, _, InstanceKind, _), field, tpe, gen) =>
           val inst = currentModule.instOf(ref, instMap(Instance(ref)).value)
-          val renamesOpt = renamesMap.get(OfModule(currentModule.module) -> Instance(inst.instance))
+          val renamesOpt = renamesMap.get((OfModule(currentModule.module), Instance(inst.instance)))
           val port = inst.ref(field)
           renamesOpt.flatMap(_.get(port)) match {
             case Some(Seq(p)) =>

diff --git a/src/main/scala/firrtl2/transforms/ConstantPropagation.scala b/src/main/scala/firrtl2/transforms/ConstantPropagation.scala
@@ -480,17 +480,17 @@ class ConstantPropagation extends Transform with RegisteredTransform {
     foldIfZeroedArg(foldIfOutsideRange(foldIfMatchingArgs(e)))
   }
 
-  final object FoldANDR extends SimplifyReductionOp {
+  object FoldANDR extends SimplifyReductionOp {
     override def identityValue = true
     override def reduce = (a: Boolean, b: Boolean) => a & b
   }
 
-  final object FoldORR extends SimplifyReductionOp {
+  object FoldORR extends SimplifyReductionOp {
     override def identityValue = false
     override def reduce = (a: Boolean, b: Boolean) => a | b
   }
 
-  final object FoldXORR extends SimplifyReductionOp {
+  object FoldXORR extends SimplifyReductionOp {
     override def identityValue = false
     override def reduce = (a: Boolean, b: Boolean) => a ^ b
   }

diff --git a/src/main/scala/firrtl2/transforms/MustDedup.scala b/src/main/scala/firrtl2/transforms/MustDedup.scala
@@ -192,7 +192,7 @@ class MustDeduplicateTransform extends Transform {
           val moduleNames = mods.map(_.leafModule).distinct
           if (moduleNames.size <= 1) None
           else {
-            val modNames = moduleNames.map(OfModule)
+            val modNames = moduleNames.map((s: String) => OfModule(s))
             Some(findDedupFailures(modNames, igraph))
           }
         case _ => None