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remove deprecated Compiler and Compiler annotations (#25)
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ekiwi committed Aug 23, 2023
1 parent c968aae commit 79924c4
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182 changes: 0 additions & 182 deletions src/main/scala/firrtl2/Compiler.scala
Original file line number Diff line number Diff line change
Expand Up @@ -386,185 +386,3 @@ trait Emitter extends Transform {
/** An output suffix to use if the output of this [[Emitter]] was written to a file */
def outputSuffix: String
}

@deprecated("This will be removed in 1.4", "FIRRTL 1.3")
object CompilerUtils extends LazyLogging {

/** Generates a sequence of [[Transform]]s to lower a Firrtl circuit
*
* @param inputForm [[CircuitForm]] to lower from
* @param outputForm [[CircuitForm]] to lower to
* @return Sequence of transforms that will lower if outputForm is lower than inputForm
*/
@deprecated(
"Use a TransformManager requesting which transforms you want to run. This will be removed in 1.4.",
"FIRRTL 1.3"
)
def getLoweringTransforms(inputForm: CircuitForm, outputForm: CircuitForm): Seq[Transform] = {
// If outputForm is equal-to or higher than inputForm, nothing to lower
if (outputForm >= inputForm) {
Seq.empty
} else {
inputForm match {
case ChirrtlForm =>
Seq(new ChirrtlToHighFirrtl) ++ getLoweringTransforms(HighForm, outputForm)
case HighForm =>
Seq(
new IRToWorkingIR,
new ResolveAndCheck,
new firrtl2.transforms.DedupModules,
new HighFirrtlToMiddleFirrtl
) ++
getLoweringTransforms(MidForm, outputForm)
case MidForm => Seq(new MiddleFirrtlToLowFirrtl) ++ getLoweringTransforms(LowForm, outputForm)
case LowForm => throwInternalError("getLoweringTransforms - LowForm") // should be caught by if above
case UnknownForm => throwInternalError("getLoweringTransforms - UnknownForm") // should be caught by if above
}
}
}

/** Merge a Seq of lowering transforms with custom transforms
*
* Custom Transforms are inserted based on their [[Transform.inputForm]] and [[Transform.outputForm]] with any
* [[Emitter]]s being scheduled last. Custom transforms are inserted in order at the last location in the Seq of
* transforms where previous.outputForm == customTransform.inputForm. If a customTransform outputs a higher form than
* input, [[getLoweringTransforms]] is used to relower the circuit.
*
* @example
* {{{
* // Let Transforms be represented by CircuitForm => CircuitForm
* val A = HighForm => MidForm
* val B = MidForm => LowForm
* val lowering = List(A, B) // Assume these transforms are used by getLoweringTransforms
* // Some custom transforms
* val C = LowForm => LowForm
* val D = MidForm => MidForm
* val E = LowForm => HighForm
* // All of the following comparisons are true
* mergeTransforms(lowering, List(C)) == List(A, B, C)
* mergeTransforms(lowering, List(D)) == List(A, D, B)
* mergeTransforms(lowering, List(E)) == List(A, B, E, A, B)
* mergeTransforms(lowering, List(C, E)) == List(A, B, C, E, A, B)
* mergeTransforms(lowering, List(E, C)) == List(A, B, E, A, B, C)
* // Notice that in the following, custom transform order is NOT preserved (see note)
* mergeTransforms(lowering, List(C, D)) == List(A, D, B, C)
* }}}
*
* @note Order will be preserved for custom transforms so long as the
* inputForm of a latter transforms is equal to or lower than the outputForm
* of the previous transform.
*/
@deprecated(
"Use a TransformManager requesting which transforms you want to run. This will be removed in 1.4.",
"FIRRTL 1.3"
)
def mergeTransforms(lowering: Seq[Transform], custom: Seq[Transform]): Seq[Transform] = {
custom.sortWith {
case (a, b) =>
(a, b) match {
case (_: Emitter, _: Emitter) => false
case (_, _: Emitter) => true
case _ => false
}
}
.foldLeft(lowering) {
case (transforms, xform) =>
val index = transforms.lastIndexWhere(_.outputForm == xform.inputForm)
assert(
index >= 0 || xform.inputForm == ChirrtlForm, // If ChirrtlForm just put at front
s"No transform in $lowering has outputForm ${xform.inputForm} as required by $xform"
)
val (front, back) = transforms.splitAt(index + 1) // +1 because we want to be AFTER index
front ++ List(xform) ++ getLoweringTransforms(xform.outputForm, xform.inputForm) ++ back
}
}

}

@deprecated("Migrate to firrtl.stage.transforms.Compiler. This will be removed in 1.4.", "FIRRTL 1.3")
trait Compiler extends Transform with DependencyAPIMigration {
def emitter: Emitter

/** The sequence of transforms this compiler will execute
* @note The inputForm of a given transform must be higher than or equal to the ouputForm of the
* preceding transform. See [[CircuitForm]]
*/
def transforms: Seq[Transform]

final override def execute(state: CircuitState): CircuitState =
new stage.transforms.Compiler(
targets = (transforms :+ emitter).map(Dependency.fromTransform),
currentState = prerequisites,
knownObjects = (transforms :+ emitter).toSet
).execute(state)

require(
transforms.size >= 1,
s"Compiler transforms for '${this.getClass.getName}' must have at least ONE Transform! " +
"Use IdentityTransform if you need an identity/no-op transform."
)

/** Perform compilation
*
* @param state The Firrtl AST to compile
* @param writer The java.io.Writer where the output of compilation will be emitted
* @param customTransforms Any custom [[Transform]]s that will be inserted
* into the compilation process by [[CompilerUtils.mergeTransforms]]
*/
@deprecated(
"Migrate to '(new FirrtlStage).execute(args: Array[String], annotations: AnnotationSeq)'." +
"This will be removed in 1.4.",
"FIRRTL 1.0"
)
def compile(state: CircuitState, writer: Writer, customTransforms: Seq[Transform] = Seq.empty): CircuitState = {
val finalState = compileAndEmit(state, customTransforms)
writer.write(finalState.getEmittedCircuit.value)
finalState
}

/** Perform compilation and emit the whole Circuit
*
* This is intended as a convenience method wrapping up Annotation creation for the common case.
* It creates a [[EmitCircuitAnnotation]] that will be consumed by this Transform's emitter. The
* [[EmittedCircuit]] can be extracted from the returned [[CircuitState]] via
* [[CircuitState.emittedCircuitOption]]
*
* @param state The Firrtl AST to compile
* @param customTransforms Any custom [[Transform]]s that will be inserted
* into the compilation process by [[CompilerUtils.mergeTransforms]]
* @return result of compilation with emitted circuit annotated
*/
@deprecated(
"Migrate to '(new FirrtlStage).execute(args: Array[String], annotations: AnnotationSeq)'." +
"This will be removed in 1.4.",
"FIRRTL 1.3.3"
)
def compileAndEmit(state: CircuitState, customTransforms: Seq[Transform] = Seq.empty): CircuitState = {
val emitAnno = EmitCircuitAnnotation(emitter.getClass)
compile(state.copy(annotations = emitAnno +: state.annotations), emitter +: customTransforms)
}

/** Perform compilation
*
* Emission will only be performed if [[EmitAnnotation]]s are present
*
* @param state The Firrtl AST to compile
* @param customTransforms Any custom [[Transform]]s that will be inserted into the compilation
* process by [[CompilerUtils.mergeTransforms]]
* @return result of compilation
*/
@deprecated(
"Migrate to '(new FirrtlStage).execute(args: Array[String], annotations: AnnotationSeq)'." +
"This will be removed in 1.4.",
"FIRRTL 1.3.3"
)
def compile(state: CircuitState, customTransforms: Seq[Transform]): CircuitState = {
val transformManager = new stage.transforms.Compiler(
targets = (emitter +: customTransforms ++: transforms).map(Dependency.fromTransform),
currentState = prerequisites,
knownObjects = (transforms :+ emitter).toSet
)
transformManager.transform(state)
}

}
166 changes: 0 additions & 166 deletions src/main/scala/firrtl2/LoweringCompilers.scala

This file was deleted.

3 changes: 3 additions & 0 deletions src/main/scala/firrtl2/logger/Logger.scala
Original file line number Diff line number Diff line change
Expand Up @@ -137,6 +137,9 @@ object Logger {
}
}

def makeDebugScope[A](codeBlock: => A): A = makeScope(Seq(LogLevelAnnotation(LogLevel.Debug)))(codeBlock)
def makeTraceScope[A](codeBlock: => A): A = makeScope(Seq(LogLevelAnnotation(LogLevel.Trace)))(codeBlock)

/**
* Used to test whether a given log statement should generate some logging output.
* It breaks up a class name into a list of packages. From this list generate progressively
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23 changes: 0 additions & 23 deletions src/main/scala/firrtl2/stage/FirrtlAnnotations.scala
Original file line number Diff line number Diff line change
Expand Up @@ -145,29 +145,6 @@ object FirrtlSourceAnnotation extends HasShellOptions {

}

/** helpValueName a [[Compiler]] that should be run
* - set stringly with `-X/--compiler`
* - If unset, a [[CompilerAnnotation]] with the default [[VerilogCompiler]]
* @param compiler compiler name
*/
@deprecated("Use a RunFirrtlTransformAnnotation targeting a specific Emitter.", "FIRRTL 1.4.0")
case class CompilerAnnotation(compiler: Compiler = new VerilogCompiler()) extends NoTargetAnnotation with FirrtlOption

@deprecated("Use a RunFirrtlTransformAnnotation targeting a specific Emitter.", "FIRRTL 1.4.0")
object CompilerAnnotation extends HasShellOptions {

val options = Seq(
new ShellOption[String](
longOption = "compiler",
toAnnotationSeq = a => Seq(RunFirrtlTransformAnnotation.stringToEmitter(a)),
helpText = "The FIRRTL compiler to use (default: verilog)",
shortOption = Some("X"),
helpValueName = Some("<none|mhigh|high|middle|low|verilog|mverilog|sverilog>")
)
)

}

/** Holds the unambiguous class name of a [[Transform]] to run
* - set with `-fct/--custom-transforms`
* @param transform the full class name of the transform
Expand Down

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