Fix rdtime - map to 32-bit cycle counter.

ultraembedded · Mar 31, 2019 · 5ce4718 · 5ce4718
1 parent 264e1ae
commit 5ce4718
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Showing 4 changed files with 8 additions and 4 deletions.
diff --git a/core/rv32i/riscv_csr.v b/core/rv32i/riscv_csr.v
@@ -448,7 +448,8 @@ begin
             else if (clr_r)
                 csr_mie_r = csr_mie_r & ~data_r;
         end
-        `CSR_MCYCLE:
+        `CSR_MCYCLE,
+        `CSR_MTIME:
         begin
             result_r = csr_mcycle_q;
         end

diff --git a/core/rv32i_spartan6/riscv_csr.v b/core/rv32i_spartan6/riscv_csr.v
@@ -448,7 +448,8 @@ begin
             else if (clr_r)
                 csr_mie_r = csr_mie_r & ~data_r;
         end
-        `CSR_MCYCLE:
+        `CSR_MCYCLE,
+        `CSR_MTIME:
         begin
             result_r = csr_mcycle_q;
         end

diff --git a/core/rv32im/riscv_csr.v b/core/rv32im/riscv_csr.v
@@ -448,7 +448,8 @@ begin
             else if (clr_r)
                 csr_mie_r = csr_mie_r & ~data_r;
         end
-        `CSR_MCYCLE:
+        `CSR_MCYCLE,
+        `CSR_MTIME:
         begin
             result_r = csr_mcycle_q;
         end

diff --git a/core/rv32imsu/riscv_csr.v b/core/rv32imsu/riscv_csr.v
@@ -627,7 +627,8 @@ begin
             else if (clr_r)
                 csr_mie_r = csr_mie_r & ~data_r;
         end
-        `CSR_MCYCLE:
+        `CSR_MCYCLE,
+        `CSR_MTIME:
         begin
             result_r = csr_mcycle_q;
         end