imx8mn-var-som: update the polarity of camera reset GPIO

The camera reset pin is active low, but was wrongly set as active high.
For SymphonyBoard < 1.5B, the buffer U14 was actually disabled, masking
the behavior of the reset pin, pulled up from the camera.
Starting from SymphonyBoard 1.5B, U14 is enabled, propagating the control
of the reset pin from the SoC to the camera, and exposing the originally
wrong behavior.

Signed-off-by: Pierluigi Passaro <pierluigi.p@variscite.com>

arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts

@@ -250,7 +250,7 @@
 		assigned-clock-rates = <24000000>;
 		csi_id = <0>;
 		powerdown-gpios = <&gpio5 12 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
 		mclk = <24000000>;
 		mclk_source = <0>;
 		mipi_csi;