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coffe
initial_sizes
input_files
sainity_check
spice_models
tests
.gitignore
Citation Guide
Developer Guide.md
README.md
User Manual.md
checkresults.pl
coffe.py
invoke.pl
test.pl

README.md

COFFE

COFFE is a tool to create the circuitry and area, delay and power models for FPGA tiles (logic, RAM or heterogeneous tiles like DSP blocks).

If you make changes to COFFE, run the "tests_top_level.py" script in the "tests" folder to do some basic checks that existing functionality still works.

How to cite:
Read the citation guide.